Steve Furber, CBE FRS FREng DFBCS FIET CITP CEng

Search results

• 2006

  A system for transmitting a coherent burst of activity through a network of spiking neurons

  Bose, J., Furber, S. B. & Shapiro, J. L., 2006, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Springer Nature, Vol. 3931. p. 44-48 4 p. (Lecture Notes in Computer Science).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Intrinsic Delay 100%

• High-performance computing for systems of spiking neurons

  Furber, S. B., Temple, S. & Brown, A., 2006, Proceedings of AISB'06: Adaptation in Artificial and Biological Systems. Vol. 2. p. 29-36 8 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • High-Performance Computing 100%
  • Parallel Computer 50%
  • Network Simulation 50%
  • Microarchitecture 50%
  • Simulation Engine 50%

• Living with failure: Lessons from nature?

  Furber, S., 2006, Proceedings - Eleventh IEEE European Test Symposium, ETS 2006|Proc. Eleventh IEEE Eur. Test Symp.. IEEE Computer Society , Vol. 2006. p. 4-5 1 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Basic Assumption 100%
  • Multiprocessor System 25%

• On-chip and inter-chip networks for modeling large-scale neural systems

  Furber, S. B., Temple, S. & Brown, A. D., 2006, ISCAS. IEEE

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• On-chip and inter-chip networks for modelling large-scale neural systems

  Furber, S. B., Temple, S. & Brown, A., 2006, Proceedings - IEEE International Symposium on Circuits and Systems. p. 1945-1948 4 p. 1692992

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Core Component 100%
  • Chip Multiprocessor 100%
  • Embedded Processor 100%
  • Power Efficiency 100%
  • Multicast Communication 100%

• The design of a dataflow coprocessor for low power embedded hierarchical processing

  Liu, Y., Furber, S. & Li, Z., 2006, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Springer Nature, Vol. 4148. p. 425-438 13 p. (Lecture Notes in Computer Science).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Coprocessor 100%
  • Power Efficiency 66%
  • Power Consumption 33%
  • Power Dissipation 33%
  • General Purpose Processor 33%
• 2005

  A low power embedded dataflow coprocessor

  Liu, Y. & Furber, S., 2005, Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI|Proc. IEEE Comput. Soc. Annu. Symp. VLSI New Frontiers VLSI Design. Smailagic, A. & Ranganathan, N. (eds.). IEEE Computer Society , p. 246-247 1 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Coprocessor 100%
  • Power Consumption 25%
  • Power Efficiency 25%
  • Conventional Architecture 25%
  • Experimental Result 25%

• An associative memory for the on-line recognition and prediction of temporal sequences

  Bose, J., Furber, S. B. & Shapiro, J. L., 2005, Proceedings of the International Joint Conference on Neural Networks (IJCNN) 2005 : July 31 - August 4, 2005, Hilton Montréal Bonaventure Hotel, Montréal, Québec, Canada. IEEE, Vol. 2. p. 1223-1228 5 p.

  Research output: Chapter in Book/Report/Conference proceeding › Chapter › peer-review

  • Associative Memory 100%
  • Temporal Sequence 100%
  • Sequence Learning 100%
  • Scalability 100%
  • Characteristic Behavior 33%

• A spiking neural sparse distributed memory implementation for learning and predicting temporal sequences

  Bose, J., Furber, S. B. & Shapiro, J. L., 2005, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Springer Nature, Vol. 3696. p. 115-120 5 p. (Lecture Notes in Computer Science).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Distributed Memory 100%
  • Temporal Sequence 100%
  • Associative Memory 50%
  • Online Learning 50%
  • Input Symbol 50%

• Future trends in SoC interconnect

  Furber, S., 2005, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT). Vol. 2005. p. 295-298 4 p. 1500079

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Network Design 100%
  • System-on-Chip 100%
  • Design Problem 100%
  • Synchronous Design 100%
  • Design Automation 100%

• Future trends in SoC interconnect

  Furber, S. & Bainbridge, J., 2005, 2005 International Symposium on System-on-Chip, Proceedings. Vol. 2005. p. 183-186 4 p. 1595673

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Power Management 100%
  • Interconnects 100%
  • Future Trend 100%
  • System-on-Chip 100%
  • Network Design 50%

• The design of an asynchronous carry-lookahead adder based on data characteristics

  Liu, Y. & Furber, S., 2005, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Springer Nature, Vol. 3728. p. 647-656 9 p. (Lecture Notes in Computer Science).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Ripple-Carry Adder 100%
  • Carry-Lookahead Adder 100%
  • Data Characteristic 100%
  • Adders 100%
  • Speed-up 33%
• 2004

  An asynchronous on-chip network router with Quality-of-Service (QoS) support

  Felicijan, T. & Furber, S. B., 2004, Proceedings - IEEE International SOC Conference. Chickanosky, J., Ha, D. & Auletta, R. (eds.). p. 274-277 4 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Network-on-Chip 100%
  • Quality of Service 100%
  • Service Requirement 25%
  • Capacity Limitation 25%
  • Physical Channel 25%

• Design and analysis of a self-timed duplex communication system

  Yakovlev, A., Furber, S., Krenz, R. & Bystrov, A., Jul 2004, In: IEEE Transactions on Computers. 53, 7, p. 798-814 16 p.

  Research output: Contribution to journal › Article › peer-review

  • Petri Net 100%
  • Direct Mapping 100%

• Minimizing the power consumption of an asynchronous multiplier

  Liu, Y. & Furber, S., 2004, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Springer Nature, Vol. 3254. p. 289-300 11 p. (Lecture Notes in Computer Science).

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Electric Power Utilization 100%
  • Power Consumption 100%
  • Low Power Electronics 33%
  • Subcircuit 33%
  • Electronic Product 33%

• Sparse distributed memory using N-of-M codes

  Furber, S. B., John Bainbridge, W., Mike Cumpstey, J. & Temple, S., Dec 2004, In: Neural Networks. 17, 10, p. 1437-1451 14 p.

  Research output: Contribution to journal › Article › peer-review

  • Technical Report 100%
  • Synaptic Weight 100%
  • Correlation Matrix 100%
  • Noisy Environment 100%

• The Design and Test of a Smartcard Chip Using a CHAIN Self-Timed Network-on-Chip

  Bainbridge, W. J., Plana, L. A. & Furber, S. B., Feb 2004, Proceedings - Design, Automation and Test in Europe Conference and Exhibition. Lindwer, M., Gerousis, V. & Fifueras, J. (eds.). IEEE Computer Society , Vol. 3. p. 274-279 6 p. 1269249

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Interconnects 100%
  • System-on-Chip 100%
  • Network-on-Chip 100%
  • Solution and Solubility 100%
  • Final Stage 50%

• The Design of a Low Power Asynchronous Multiplier

  Liu, Y. & Furber, S., 2004, Proceedings of the International Symposium on Low Power Electronics and Design. January ed. IEEE, Vol. 2004-January. p. 301-306 6 p. 1349355

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • radix 2 100%
  • radix-4 100%
• 2003

  An asynchronous copy-back cache architecture

  Hormdee, D., Garside, J. D. & Furber, S. B., 3 Nov 2003, In: Microprocessors and Microsystems. 27, 10, p. 485-500 15 p.

  Research output: Contribution to journal › Article › peer-review

  • Embedded Processor 100%
  • Power Efficiency 100%
  • Processor Core 100%
  • Memory Subsystem 100%

• An asynchronous low latency arbiter for Quality of Service (QoS) applications

  Felicijan, T., Bainbridge, W. & Furber, S., 2003, Proceedings of the International Conference on Microelectronics, ICM. IEEE, Vol. 2003-January. p. 123-126 4 p. 1287737

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Service Application 100%
  • Quality of Service 100%
  • Resource Allocation 50%

• An asynchronous ternary logic signaling system

  Felicijian, T. & Furber, S. B., Dec 2003, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11, 6, p. 1114-1119 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Signalling System 100%
  • Transmissions 50%
  • Electric Power Utilization 50%
  • Network-on-Chip 25%
  • Simulation Result 25%

• An investigation into the security of self-timed circuits

  Yu, Z. C., Furber, S. B. & Plana, L. A., 2003, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. IEEE Computer Society , p. 206-215 9 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Clock Signal 100%
  • Side Channel Attack 100%
  • Make Reference 100%
  • Power Analysis 100%

• Delay-insensitive, point-to-point interconnect using M-of-N codes

  Bainbridge, W. J., Toms, W. B., Edwards, D. A. & Furber, S. B., 2003, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. p. 132-140 8 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Networks on Chips 100%
  • Interconnect Link 100%
  • Interconnects 100%
  • Network-on-Chip 33%

• Designing robust asynchronous circuit components

  Mohammadi, S., Furber, S. & Garside, J., Jun 2003, In: IEE Proceedings: Circuits, Devices and Systems. 150, 3, p. 161-166 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Hazards 100%
  • Free Operation 100%
  • Input Condition 50%
  • Input Sequence 33%
  • Gate Circuit 33%

• Microprocessors and Microsystems: Editorial

  Furber, S., Oct 2003, In: Microprocessors and Microsystems. 27, 9, p. 407-408 1 p.

  Research output: Contribution to journal › Article › peer-review
• 2002

  An Asynchronous Victim Cache

  Hormdee, D., Garside, J. & Furber, S. B., 1 Sept 2002, Proceedings Euromicro Symposium on Digital System Design. IEEE Computer Society , p. 4-11 8 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Limiting Factor 100%
  • asynchronous system 100%
  • Memory Bandwidth 100%

• Chain: A delay-insensitive chip area interconnect

  Bainbridge, J. & Furber, S., Sept 2002, In: IEEE Micro. 22, 5, p. 16-23 7 p.

  Research output: Contribution to journal › Article › peer-review

• Validating the AMULET microprocessors

  Furber, S., 2002, In: Computer Journal. 45, 1, p. 19-26 7 p.

  Research output: Contribution to journal › Article › peer-review

  • Microprocessor Chips 100%
  • Design Time 50%
  • Design Quality 50%
• 2001

  Applying asynchronous techniques to a vtterbi decoder design

  Brackenbury, L. E. M., Cumpstey, M., Furber, S. B. & Riocreux, P. A., 19 Jan 2001, In: IEE Colloquium (Digest). 42, p. 7-11 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Low Power 100%
  • Error Correction 100%
  • Digital Television 33%

• Delay insensitive system-on-chip interconnect using 1-of-4 data encoding

  Bainbridge, W. J. & Furber, S. B., 2001, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. IEEE Computer Society , p. 118-126 8 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Point Connection 100%

• Power management in the amulet microprocessors

  Furber, S. B., Efthymiou, A., Garside, J. D., Lloyd, D. W., Lewis, M. J. G. & Temple, S., Mar 2001, In: IEEE Design and Test of Computers. 18, 2, p. 42-51 9 p.

  Research output: Contribution to journal › Article › peer-review

  • Power Management 100%
  • Control Framework 100%

• Processors

  Garside, J. D., Sparsø, J. (Editor) & Furber, S. (Editor), 2001, Principles of Asynchronous Circuit Design - A Systems Perspective. Kluwer Academic Publishers

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Circuit Design 100%
  • Microprocessor Chips 50%
  • Illustrates 50%
  • Industrial Designer 50%
  • Design Task 50%
• 2000

  AMULET3: A 100 MIPS asynchronous embedded processor

  Furber, S. B., Edwards, D. A. & Garside, J. D., 2000, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors|Proc IEEE Int Conf Comput Des VLSI Comput Process. Piscataway, NJ, United States: IEEE, p. 329-334 5 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Embedded Processor 100%
  • Power Efficiency 100%
  • Power Management 100%
  • Processor Design 100%
  • Processor Core 100%

• AMULET3i - An asynchronous system-on-chip

  Garside, J. D., Bainbridge, W. J., Bardsley, A., Clark, D. M., Edwards, D. A., Furber, S. B., Liu, J., Lloyd, D. W., Mohammadi, S., Pepper, J. S., Petlin, O., Temple, S. & Woods, J. V., 2000, Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.. IEEE Computer Society , p. 162-175 13 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • System-on-Chip 100%
  • Microprocessor Chips 50%

• A novel area-efficient binary adder

  Furber, S. B. & Liu, J., 2000, Conference Record of the Asilomar Conference on Signals, Systems and Computers. Vol. 1. p. 119-123 5 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Power Efficiency 100%
  • Coprocessor 100%
  • Binary Addition 100%
  • Adders 100%
  • ARM Processors 50%

• MARBLE: An asynchronous on-chip macrocell bus

  Bainbridge, W. J. & Furber, S. B., 1 Aug 2000, In: Microprocessors and Microsystems. 24, 4, p. 213-222 10 p.

  Research output: Contribution to journal › Article › peer-review

  • Macrocell 100%
  • Bridging 33%
  • Differential Mobility Analyzer 33%
  • Design Style 33%
  • Microprocessor System 33%

• On-chip timing reference for self-timed microprocessor

  Temple, S. & Furber, S. B., 25 May 2000, In: Electronics Letters. 36, 11, p. 942-943 2 p.

  Research output: Contribution to journal › Article › peer-review

  • Microprocessor Chips 100%
  • Peripheral Device 100%
  • Low Power Consumption 50%
  • Electromagnetic Interference 50%
• 1999

  AMULET2e: An asynchronous embedded controller

  Furber, S. B., Garside, J. D., Riocreux, P., Temple, S., Day, P., Liu, J. & Paver, N. C., 1999, In: Institute of Electrical and Electronics Engineers. Proceedings . 87, 2, p. 243-256 14 p.

  Research output: Contribution to journal › Article › peer-review

  • Embedded Systems 100%
  • Power Efficiency 100%
  • Memory Interface 100%
  • Asynchronous Operation 100%
  • System Clock 100%

• AMULET3 revealed

  Garside, J. D., Furber, S. B. & Chung, S. H., 1999, Proceedings - International Symposium on Asynchronous Circuits and Systems. IEEE Computer Society , p. 51-59 9 p. 761522

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Thumb Instruction Set 100%
  • Memory Bandwidth 100%
• 1998

  AMULET3: a high-performance self-timed ARM microprocessor

  Furber, S. B., Garside, J. D. & Gilbert, D. A., 1998, Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors. IEEE, p. 247-252 6 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

  • Design Framework 100%
  • Internal Microarchitecture 100%

• Asynchronous embedded control

  Furber, S. B., Garside, J. D., Temple, S., Day, P. & Paver, N. C., 1998, In: Integrated Computer-Aided Engineering. 5, 1, p. 57-68 12 p.

  Research output: Contribution to journal › Article › peer-review

  • Microprocessor Chips 100%
  • Electromagnetic Compatibility 100%
  • Detail Design 100%
  • Memory Interface 100%
  • Embedded Systems 100%

• Asynchronous Macrocell Interconnect using MARBLE

  Bainbridge, W. J. & Furber, S. B., 1998, ASYNC. IEEE Computer Society , p. 122-132 11 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• Modelling and Simulation of Asynchronous Systems Using the LARD Hardware Description Language

  Endecott, P., Furber, S. B., Zobel, R. N. (Editor) & Möller, D. P. F. (Editor), 1998, ESM. Zobel, R. N. & Möller, D. P. F. (eds.). SCS Europe BVBA, p. 39-43 5 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• The design of an asynchronous VHDL synthesizer

  Tan, S. Y., Furber, S. B. & Yen, W. F., 1998, Proceedings -Design, Automation and Test in Europe, DATE|Proc. Des. Autom. Test Eur. DATE. IEEE Computer Society , p. 44-51 7 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Microprocessor Chips 100%
  • Design Time 100%
• 1997

  AMULET 1: An asynchronous ARM microprocessor

  Woods, J. V., Day, P., Furber, S. B., Garside, J. D., Paver, N. C. & Temple, S., 1997, In: IEEE Transactions on Computers. 46, 4, p. 385-398 14 p.

  Research output: Contribution to journal › Article › peer-review

  • Microprocessor Chips 100%
  • Prefetch 100%
  • Internals 50%
  • Locking Mechanism 50%
  • Design Display 50%

• AMULET1: A Asynchronous ARM Microprocessor

  Woods, J. V., Day, P., Furber, S. B., Garside, J. D., Paver, N. C. & Temple, S., 1997, In: IEEE Trans. Computers. 46, 4, p. 385-398 14 p.

  Research output: Contribution to journal › Article

• AMULET2e: An asynchronous embedded controller

  Furber, S. B., Garside, J. D., Temple, S., Liu, J., Day, P. & Paver, N. C., 1997, Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems|Proc Int Symp Adv Res Asynchr Circuits Syst. Anon (ed.). Los Alamitos, CA, United States: IEEE, p. 290-299 9 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Embedded Systems 100%
  • Power Consumption 100%
  • Power Efficiency 100%
  • Sensitive Application 100%
  • Memory Interface 100%

• Built-in self-testing of micropipelines

  Petlin, O. A. & Furber, S. B., 1997, Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems|Proc Int Symp Adv Res Asynchr Circuits Syst. Anon (ed.). Los Alamitos, CA, United States: IEEE, p. 22-29 7 p.

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

  • Built-in Self Test 100%
  • Test Procedure 50%
  • Microprocessor Chips 50%
  • Linear Shift 50%
  • Shift Register 50%
• 1996

  Breaking step - The return of asynchronous logic

  Furber, S. B., 1996, IEE Colloquium (Digest)|IEE Colloq Dig. IEEE Computer Society , p. 1/4

  Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

• Design for testability of an asynchronous adder

  Petlin, O. A., Farnsworth, C. & Furber, S. B., 1996, In: IEE Colloquium (Digest). 40

  Research output: Contribution to journal › Article › peer-review