Steve Furber, CBE FRS FREng DFBCS FIET CITP CEng

Search results

• 2014

  Real-time million-synapse simulation of rat barrel cortex

  Sharp, T., Petersen, R. & Furber, S., 2014, In: Frontiers in Neuroscience. 8, 131.

  Research output: Contribution to journal › Article › peer-review

  • Parallelism 100%
  • Computer Architecture 100%
  • Computing Resource 100%
  • Cortical Area 100%
  • Performance Computer 100%

• SpiNNaker - programming model

  Brown, A. D., Furber, S., Reeve, J. S., Garside, J. D., Dugan, K. J., Plana, L. A. & Temple, S., 13 Jun 2014, In: I E E E Transactions on Computers. 64, 6, p. 1769-1782 13 p.

  Research output: Contribution to journal › Article › peer-review

  Open Access

  • Multicore 100%
  • Programming Model 100%
  • Message Passing 100%
  • Printed Circuit Board 100%
  • Communication Infrastructure 100%

• The SpiNNaker project

  Furber, S. B., Galluppi, F., Temple, S. & Plana, L. A., 27 Feb 2014, In: Institute of Electrical and Electronics Engineers. Proceedings . 102, 5, p. 652-665 13 p., 6750072.

  Research output: Contribution to journal › Article › peer-review

  Open Access

  • Mammalian Brain 100%
• 2013

  Algebraic approach to time borrowing

  Broomhead, D., Furber, S. & Johnson, M., 2013, In: IET Computers and Digital Techniques. 7, 1, p. 1-10 9 p.

  Research output: Contribution to journal › Article › peer-review

  • Linear Algebra 100%
  • Clock Cycle 100%
  • Algorithmic Approach 100%
  • Semi-Ring 50%
  • Heuristic Approach 50%

• Interconnection system for the SpiNNaker biologically inspired multi-computer

  Dugan, K., Reeve, J., Brown, A. & Furber, S., 2013, In: IET Computers and Digital Techniques. 7, 3, p. 115-121 7 p.

  Research output: Contribution to journal › Article › peer-review

  • Input/Output 100%
  • System Interconnection 100%
  • Nodes 100%
  • System Software 50%
  • Multicore 50%

• Overview of the SpiNNaker system architecture

  Furber, S. B., Lester, D. R., Plana, L. A., Garside, J. D., Painkras, E., Temple, S. & Brown, A. D., 2013, In: IEEE Transactions on Computers. 62, 12, p. 2454-2467 13 p., 6226357.

  Research output: Contribution to journal › Article › peer-review

  • Component Failure 100%

• SpiNNaker: A 1-W 18-core system-on-chip for massively-parallel neural network simulation

  Painkras, E., Plana, L. A., Garside, J., Temple, S., Galluppi, F., Patterson, C., Lester, D. R., Brown, A. D. & Furber, S. B., 2013, In: IEEE Journal of Solid State Circuits. 48, 8, p. 1943-1953 10 p., 6515159.

  Research output: Contribution to journal › Article › peer-review

  Open Access

  • Nodes 100%
  • Synchronous System 100%
  • Simulators 100%
  • Building Block 100%
  • System-on-Chip 100%

• SpiNNaker: Fault tolerance in a power- and area- Constrained large-Scale neuromimetic architecture

  Navaridas, J., Furber, S., Garside, J., Jin, X., Khan, M., Lester, D., Luján, M., Miguel-Alonso, J., Painkras, E., Patterson, C., Plana, L. A., Rast, A., Richards, D., Shi, Y., Temple, S., Wu, J. & Yang, S., 2013, In: Parallel Computing. 39, 11, p. 693-708 15 p.

  Research output: Contribution to journal › Article › peer-review

  • Degradation System 100%
• 2012

  A forecast-based STDP rule suitable for neuromorphic implementation

  Davies, S., Galluppi, F., Rast, A. D. & Furber, S. B., Aug 2012, In: Neural Networks. 32, p. 3-14 11 p.

  Research output: Contribution to journal › Article › peer-review

  • Spike-Timing-Dependent Plasticity 100%
  • Neural Network 36%
  • Complementary Solution 33%
  • Membrane Potential 27%
  • Critical Application 25%

• Creating, documenting and sharing network models

  Crook, S. M., Bednar, J. A., Berger, S., Cannon, R., Davison, A. P., Djurfeldt, M., Eppler, J., Kriener, B., Furber, S., Graham, B., Plesser, H. E., Schwabe, L., Smith, L., Steuber, V. & Van Albada, S., 2012, In: Network: Computation in Neural Systems. 23, 4, p. 131-149 18 p.

  Research output: Contribution to journal › Article › peer-review

  • Model for Network 100%
  • Component Model 100%
  • Simulation Environment 100%

• Managing burstiness and scalability in event-driven models on the spinnaker neuromimetic system

  Rast, A., Navaridas Palma, J., Jin, X., Galluppi, F., Plana, L. A., Miguel-Alonso, J., Patterson, C., Lujan, M. & Furber, S., Dec 2012, In: International Journal of Parallel Programming. 40, 6, p. 553-582 30 p.

  Research output: Contribution to journal › Article › peer-review

  • Event Handling 100%
  • Neural Network 100%
  • Network Performance 50%
  • Satisfactory Solution 50%
  • Dedicated Hardware 50%

• Modelling normal and impaired letter recognition: Implications for understanding pure alexic reading

  Chang, Y. N., Furber, S. & Welbourne, S., Oct 2012, In: NEUROPSYCHOLOGIA. 50, 12, p. 2773-2788 15 p.

  Research output: Contribution to journal › Article › peer-review

  Open Access

  File

  • Word Length 100%
  • Word Length Effect 100%
  • Reading Time 100%
  • Pure Alexia 100%
  • Visual Processing 50%
  145 Downloads (Pure)

• Power-efficient simulation of detailed cortical microcircuits on SpiNNaker

  Sharp, T., Galluppi, F., Rast, A. & Furber, S., 15 Sept 2012, In: Journal of Neuroscience Methods. 210, 1, p. 110-118 8 p.

  Research output: Contribution to journal › Article › peer-review

  • Digital Computer 100%

• Scalable communications for a million-core neural processing architecture

  Patterson, C., Garside, J., Painkras, E., Temple, S., Plana, L. A., Navaridas, J., Sharp, T. & Furber, S., Nov 2012, In: Journal of Parallel and Distributed Computing. 72, 11, p. 1507-1520 13 p.

  Research output: Contribution to journal › Article › peer-review

  • Multi-Processor System-on-Chip 100%
  • Processing Architecture 100%
  • High-Performance Computing 50%
  • Computing Platform 50%
  • Power Efficient 50%

• " Serial" effects in parallel models of reading

  Chang, Y. N., Furber, S. & Welbourne, S., Jun 2012, In: Cognitive Psychology. 64, 4, p. 267-291 24 p.

  Research output: Contribution to journal › Article › peer-review

  Open Access

  File

  • Orthographic Representation 100%
  • Word Length Effect 100%
  • Word Length 50%
  217 Downloads (Pure)

• To build a brain

  Furber, S., 2012, In: IEEE Spectrum. 49, 8, p. 45-49 4 p., 6247562.

  Research output: Contribution to journal › Article › peer-review

  • Parsing 100%
  • Supercomputer 100%
  • Digital Circuit 100%
  • Synapse 100%
  • Limb 100%
• 2011

  A novel programmable parallel CRC circuit

  Grymel, M. & Furber, S. B., Oct 2011, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 19, 10, p. 1898-1902 4 p., 5549980.

  Research output: Contribution to journal › Article › peer-review

  • Energy Conservation 100%
  • Control Matrix 100%
  • Energy Efficiency 100%
  • Realization 100%
  • Transition Matrix 100%

• Concurrent heterogeneous neural model simulation on real-time neuromimetic hardware

  Rast, A., Galluppi, F., Davies, S., Plana, L. A., Patterson, C., Sharp, T., Lester, D. & Furber, S., Nov 2011, In: Neural Networks. 24, 9, p. 961-978 17 p.

  Research output: Contribution to journal › Article › peer-review

  • Neural Model 100%
  • Temporal Abstraction 100%
  • Complex Model 25%
  • Heterogeneous Network 25%
  • Illustrates 25%

• Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric

  Khan, M. M., Rast, A., Navaridas Palma, J., Jin, X., Plana, L. A., Lujan, M., Temple, S., Patterson, C., Richards, D., Woods, J. V., Miguel-Alonso, J. & Furber, S., Aug 2011, In: Parallel Computing. 37, 8, p. 392-409 18 p.

  Research output: Contribution to journal › Article › peer-review

  • Interconnects 100%
  • Multiprocessor System 100%
  • Chip Multiprocessor 100%
  • Fabric Interconnect 100%
  • Neural Network 100%

• SpiNNaker: Design and implementation of a GALS multicore system-on-chip

  Plana, L. A., Clark, D., Davidson, S., Furber, S., Garside, J., Painkras, E., Pepper, J., Temple, S. & Bainbridge, J., Dec 2011, In: ACM Journal on Emerging Technologies in Computing Systems. 7, 4, 17.

  Research output: Contribution to journal › Article › peer-review

  • Computer Aided Design 100%
• 2010

  A multicast routing scheme for a universal spiking neural network architecture

  Wu, J. & Furber, S., Mar 2010, In: Computer Journal. 53, 3, p. 280-288 8 p.

  Research output: Contribution to journal › Article › peer-review

  • routing scheme 100%

• Biologically inspired means for rank-order encoding images: a quantitative analysis

  Sen Bhattacharya, B. & Furber, S. B., Jul 2010, In: IEEE Transactions on Neural Networks. 21, 7, p. 1087-1099 13 p., 5484611.

  Research output: Contribution to journal › Article › peer-review

  • Retinal Ganglion Cell 100%
  • Ganglion Cell 100%
  • Sensory Neuron 100%
  • Lateral Inhibition 100%

• Interfacing real-time spiking I/O with the SpiNNaker neuromimetic architecture

  Davies, S., Patterson, C., Galluppi, F., Rast, A., Lester, D. & Furber, S., 2010, In: Australian Journal of Intelligent Information Processing Systems. 11, 1, p. 7-11 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Robotic System 100%
  • Artificial Neural Network 100%
  • Robot 50%
  • Closed Loop 50%
  • Neural Input 50%

• Interfacing Real-Time Spiking I/O with the SpiNNaker neuromimetic architecture

  Davies, S., Patterson, C., Galluppi, F., Rast, A., Lester, D. & Furber, S., 2010, In: Australian Journal of Intelligent Information Processing Systems. 11, 1, p. 7-11 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Robotic System 100%
  • Artificial Neural Network 100%
  • Robot 50%
  • Closed Loop 50%
  • Neural Input 50%

• Modeling spiking neural networks on SpiNNaker

  Jin, X., Luján, M., Plana, L. A., Davies, S., Temple, S. & Furber, S. B., Sept 2010, In: Computing in Science and Engineering. 12, 5, p. 91-97 6 p., 5562477.

  Research output: Contribution to journal › Article › peer-review

  • Parallel Architectures 100%
  • Processing Core 100%
  • Neural Network 100%
• 2008

  The future of computer technology and its implications for the computer industry

  Furber, S., Nov 2008, In: Computer Journal. 51, 6, p. 735-740 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Computer Industry 100%
  • Computer Technology 100%
  • Specific Industry 100%
  • Semiconductor Industry 100%
  • Announcement Effect 100%

• The machinations of the mind [brain models]

  Furber, S., 2008, In: Engineering and Technology. 3, 5, p. 36-39 4 p.

  Research output: Contribution to journal › Article › peer-review

  • Hard Drive 100%
  • Protocerebrum 100%
  • Synapse 100%
• 2007

  A GALS infrastructure for a massively parallel multiprocessor

  Plana, L. A., Furber, S. B., Temple, S., Khan, M., Shi, Y., Wu, J. & Yang, S., Sept 2007, In: IEEE Design and Test of Computers. 24, 5, p. 454-463 9 p.

  Research output: Contribution to journal › Article › peer-review

  • Neural Network Architecture 100%
  • Switched Fabric 100%
  • multi-processor 100%

• Neural systems engineering

  Furber, S. & Temple, S., 22 Apr 2007, In: Journal of the Royal Society Interface. 4, 13, p. 193-206 13 p.

  Research output: Contribution to journal › Article › peer-review

  • Computing Power 100%
  • Great Deal 100%
  • Moore's Law 100%
  • Human Brain 100%
  • Neural System 100%

• Sparse distributed memory using rank-order neural codes

  Furber, S. B., Brown, G., Bose, J., Cumpstey, J. M., Marshall, P. & Shapiro, J. L., May 2007, In: IEEE Transactions on Neural Networks. 18, 3, p. 648-659 11 p.

  Research output: Contribution to journal › Article › peer-review

  • Behavior (Neuroscience) 100%
• 2004

  Design and analysis of a self-timed duplex communication system

  Yakovlev, A., Furber, S., Krenz, R. & Bystrov, A., Jul 2004, In: IEEE Transactions on Computers. 53, 7, p. 798-814 16 p.

  Research output: Contribution to journal › Article › peer-review

  • Petri Net 100%
  • Direct Mapping 100%

• Sparse distributed memory using N-of-M codes

  Furber, S. B., John Bainbridge, W., Mike Cumpstey, J. & Temple, S., Dec 2004, In: Neural Networks. 17, 10, p. 1437-1451 14 p.

  Research output: Contribution to journal › Article › peer-review

  • Technical Report 100%
  • Synaptic Weight 100%
  • Correlation Matrix 100%
  • Noisy Environment 100%
• 2003

  An asynchronous copy-back cache architecture

  Hormdee, D., Garside, J. D. & Furber, S. B., 3 Nov 2003, In: Microprocessors and Microsystems. 27, 10, p. 485-500 15 p.

  Research output: Contribution to journal › Article › peer-review

  • Embedded Processor 100%
  • Power Efficiency 100%
  • Processor Core 100%
  • Memory Subsystem 100%

• An asynchronous ternary logic signaling system

  Felicijian, T. & Furber, S. B., Dec 2003, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11, 6, p. 1114-1119 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Signalling System 100%
  • Transmissions 50%
  • Electric Power Utilization 50%
  • Network-on-Chip 25%
  • Simulation Result 25%

• Designing robust asynchronous circuit components

  Mohammadi, S., Furber, S. & Garside, J., Jun 2003, In: IEE Proceedings: Circuits, Devices and Systems. 150, 3, p. 161-166 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Hazards 100%
  • Free Operation 100%
  • Input Condition 50%
  • Input Sequence 33%
  • Gate Circuit 33%

• Microprocessors and Microsystems: Editorial

  Furber, S., Oct 2003, In: Microprocessors and Microsystems. 27, 9, p. 407-408 1 p.

  Research output: Contribution to journal › Article › peer-review
• 2002

  Chain: A delay-insensitive chip area interconnect

  Bainbridge, J. & Furber, S., Sept 2002, In: IEEE Micro. 22, 5, p. 16-23 7 p.

  Research output: Contribution to journal › Article › peer-review

• Validating the AMULET microprocessors

  Furber, S., 2002, In: Computer Journal. 45, 1, p. 19-26 7 p.

  Research output: Contribution to journal › Article › peer-review

  • Microprocessor Chips 100%
  • Design Time 50%
  • Design Quality 50%
• 2001

  Applying asynchronous techniques to a vtterbi decoder design

  Brackenbury, L. E. M., Cumpstey, M., Furber, S. B. & Riocreux, P. A., 19 Jan 2001, In: IEE Colloquium (Digest). 42, p. 7-11 5 p.

  Research output: Contribution to journal › Article › peer-review

  • Low Power 100%
  • Error Correction 100%
  • Digital Television 33%

• Power management in the amulet microprocessors

  Furber, S. B., Efthymiou, A., Garside, J. D., Lloyd, D. W., Lewis, M. J. G. & Temple, S., Mar 2001, In: IEEE Design and Test of Computers. 18, 2, p. 42-51 9 p.

  Research output: Contribution to journal › Article › peer-review

  • Power Management 100%
  • Control Framework 100%
• 2000

  MARBLE: An asynchronous on-chip macrocell bus

  Bainbridge, W. J. & Furber, S. B., 1 Aug 2000, In: Microprocessors and Microsystems. 24, 4, p. 213-222 10 p.

  Research output: Contribution to journal › Article › peer-review

  • Macrocell 100%
  • Bridging 33%
  • Differential Mobility Analyzer 33%
  • Design Style 33%
  • Microprocessor System 33%

• On-chip timing reference for self-timed microprocessor

  Temple, S. & Furber, S. B., 25 May 2000, In: Electronics Letters. 36, 11, p. 942-943 2 p.

  Research output: Contribution to journal › Article › peer-review

  • Microprocessor Chips 100%
  • Peripheral Device 100%
  • Low Power Consumption 50%
  • Electromagnetic Interference 50%
• 1999

  AMULET2e: An asynchronous embedded controller

  Furber, S. B., Garside, J. D., Riocreux, P., Temple, S., Day, P., Liu, J. & Paver, N. C., 1999, In: Institute of Electrical and Electronics Engineers. Proceedings . 87, 2, p. 243-256 14 p.

  Research output: Contribution to journal › Article › peer-review

  • Embedded Systems 100%
  • Power Efficiency 100%
  • Memory Interface 100%
  • Asynchronous Operation 100%
  • System Clock 100%
• 1998

  Asynchronous embedded control

  Furber, S. B., Garside, J. D., Temple, S., Day, P. & Paver, N. C., 1998, In: Integrated Computer-Aided Engineering. 5, 1, p. 57-68 12 p.

  Research output: Contribution to journal › Article › peer-review

  • Microprocessor Chips 100%
  • Electromagnetic Compatibility 100%
  • Detail Design 100%
  • Memory Interface 100%
  • Embedded Systems 100%
• 1997

  AMULET 1: An asynchronous ARM microprocessor

  Woods, J. V., Day, P., Furber, S. B., Garside, J. D., Paver, N. C. & Temple, S., 1997, In: IEEE Transactions on Computers. 46, 4, p. 385-398 14 p.

  Research output: Contribution to journal › Article › peer-review

  • Microprocessor Chips 100%
  • Prefetch 100%
  • Internals 50%
  • Locking Mechanism 50%
  • Design Display 50%

• AMULET1: A Asynchronous ARM Microprocessor

  Woods, J. V., Day, P., Furber, S. B., Garside, J. D., Paver, N. C. & Temple, S., 1997, In: IEEE Trans. Computers. 46, 4, p. 385-398 14 p.

  Research output: Contribution to journal › Article
• 1996

  Design for testability of an asynchronous adder

  Petlin, O. A., Farnsworth, C. & Furber, S. B., 1996, In: IEE Colloquium (Digest). 40

  Research output: Contribution to journal › Article › peer-review

• Four-phase micropipeline latch control circuits

  Furber, S. B. & Day, P., 1996, In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 4, 2, p. 247-253 6 p.

  Research output: Contribution to journal › Article › peer-review

  • Cost Performance 100%
  • Design Technique 100%
  • Phase Control 100%
• 1995

  Designing asynchronous sequential circuits for random pattern testability

  Petlin, O. A., Furber, S. B., Romankevich, A. M. & Groll, V. V., Jul 1995, In: IEE Proceedings: Computers and Digital Techniques. 142, 4, p. 299-305 7 p.

  Research output: Contribution to journal › Article › peer-review

  • Testability 100%
  • Sequential Circuits 100%
  • Random Pattern 100%
  • Total Number 66%
  • Test Procedure 33%