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Vasileios Pavlidis

Dr

 https://orcid.org/0000-0002-4063-4652
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  • 2020

    Efficient Linear System Solution Techniques in the Simulation of Large Dense Mutually Inductive Circuits

    Antoniadis, C., Mihajlovic, M., Evmorfopoulos, N., Stamoulis, G. & Pavlidis, V., 10 Feb 2020, Proceedings - 2019 IEEE International Conference on Computer Design, ICCD 2019. p. 405-408 4 p. 8988760. (Proceedings - 2019 IEEE International Conference on Computer Design, ICCD 2019).

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

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    288 Downloads (Pure)
  • 2019

    An Overview of Thermal Challenges and Opportunities for Monolithic 3D ICs

    Shukla, P., Coskun, A., Pavlidis, V. & Salman, E., 13 May 2019, Great Lakes Symposium on VLSI. Association for Computing Machinery

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

    Open Access
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    109 Downloads (Pure)

  • Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies

    Maragkoudaki, E., Mroszczyk, P. & Pavlidis, V., 2019, NanoArch Conference 2018.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

    Open Access
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    210 Downloads (Pure)
  • 2018

    Mismatch Compensation Technique for Inverter-Based CMOS Circuits

    Mroszczyk, P. & Pavlidis, V., 2018, IEEE International Symposium on Circuits and Systems.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

    Open Access
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    452 Downloads (Pure)

  • Ultra-Low Swing CMOS Transceiver for 2.5-D Integrated Systems

    Mroszczyk, P. & Pavlidis, V., 2018, 2018 19th International Symposium on Quality Electronic Design, ISQED 2018. p. 262-267 6 p. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2018-March).

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

    Open Access
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    261 Downloads (Pure)
  • 2017

    Computationally Efficient Standard-Cell FEM-based Thermal Analysis

    Mihajlovic, M., Ladenheim, S., Chen, Y.-C., Kalargaris, C. & Pavlidis, V., 14 Dec 2017, International Conference on Computer-Aided Design. Association for Computing Machinery, 8 p. (2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)).

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

    Open Access
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    231 Downloads (Pure)

  • Contactless Inter-Tier Communication for Heterogeneous 3-D ICs

    Pavlidis, V. & Papistas, I., 20 Feb 2017, (Accepted/In press) International Symposium on Circuits and Systems. 4 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

    Open Access
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    215 Downloads (Pure)

  • IC Thermal Analyzer for Versatile 3-D Structures Using Multigrid Preconditioned Krylov Methods

    Ladenheim, S., Chen, Y.-C., Mihajlovic, M. & Pavlidis, V., 23 Jan 2017, 2016 International Conference On Computer Aided Design. IEEE, 6 p. (2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ).

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

    Open Access
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    236 Downloads (Pure)
  • 2016

    Advanced circuit interface for systems with multiple voltage domains

    Kalargaris, H., Goodacre, J. & Pavlidis, V. F., 22 Jul 2016, 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2016. IEEE, 7519472

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

    Open Access
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    227 Downloads (Pure)

  • Crosstalk noise effects of on-chip inductive links on power delivery networks

    Papistas, I. & Pavlidis, V., 29 Jul 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS) . IEEE, p. 1938-1941 4 p. 7538953

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

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    209 Downloads (Pure)

  • Inter-tier crosstalk noise on power delivery networks for 3-D ICs with inductively-coupled interconnects

    Papistas, I. & Pavlidis, V., 18 May 2016, GLSVLSI 2016 - Proceedings of the 2016 ACM Great Lakes Symposium on VLSI. Association for Computing Machinery, p. 257-262 6 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

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    179 Downloads (Pure)
  • 2015

    Bandwidth-to-Area Comparison of Through Silicon Vias and Inductive Links for 3-D ICs

    Papistas, I. & Pavlidis, V., 2015, Proceedings of the IEEE European Conference on Circuit Theory and Design. p. 1-4 4 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

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    176 Downloads (Pure)
  • 2014

    Interconnect design tradeoffs for silicon and glass interposers

    Kalargaris, H. & Pavlidis, V. F., 22 Oct 2014, 2014 IEEE 12th International New Circuits and Systems Conference, NEWCAS 2014. IEEE, p. 77-80 4 p. 6933989

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2013

    3.5-D integration: A case study

    Bobba, S., Gaillardon, P. E., Seiculescu, C., Pavlidis, V. F. & De Micheli, G., 2013, 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013. p. 2087-2090 4 p. 6572285

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2012

    Enhanced wafer matching heuristics for 3-D ICs

    Pavlidis, V. F., Xu, H. & De Micheli, G., 2012, Proceedings - 2012 17th IEEE European Test Symposium, ETS 2012|Proc. - IEEE Eur. Test Symp., ETS. IEEE

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Low-power clock distribution networks for 3-D ICs

    Rahimian, S., De Micheli, G. & Pavlidis, V. F., 2012, 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2012. 6377030

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • The combined effect of process variations and power supply noise on clock skew and jitter

    Xu, H., Pavlidis, V. F., Burleson, W. & De Micheli, G., 2012, Proceedings - International Symposium on Quality Electronic Design, ISQED|Proc. - Int. Symp. Qual. Electron. Des., ISQED. IEEE, p. 320-327 7 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Voltage propagation method for 3-D power grid analysis

    Zhang, C., Pavlidis, V. F. & De Micheli, G., 2012, Proceedings -Design, Automation and Test in Europe, DATE|Proc. Des. Autom. Test Eur. DATE. IEEE, p. 844-847 3 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2011

    Analytical heat transfer model for thermal through-silicon vias

    Xu, H., Pavlidis, V. F. & De Micheli, G., 2011, Proceedings -Design, Automation and Test in Europe, DATE|Proc. Des. Autom. Test Eur. DATE. IEEE, p. 395-400 5 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Clock distribution models of 3-D integrated systems

    Savidis, I., Pavlidis, V. & Friedman, E. G., 2011, Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst. IEEE, p. 2225-2228 3 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Design Methods and Tools for 3D Integration

    Micheli, G. D., Pavlidis, V. F., Atienza, D. & Leblebici, Y., Jun 2011, Proceedings of the VLSI Technology Symposium. p. 182-183 2 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Design of resonant clock distribution networks for 3-D integrated circuits

    Rahimian, S., Pavlidis, V. F. & De Micheli, G., 2011, Integrated Circuit and System Design: Power and Timing Modeling, Optimization, and Simulation - 21st International Workshop, PATMOS 2011, Proceedings. Vol. 6951 LNCS. p. 267-277 11 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 6951 LNCS).

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics): Preface

    Pavlidis, V., Ayala, J. L. & Prieto, M., 2011, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Springer Nature, Vol. 6951.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Skew variability in 3-D ICs with multiple clock domains

    Xu, H., Pavlidis, V. F. & De Micheli, G., 2011, Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst. IEEE, p. 2221-2224 3 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2010

    Performance analysis of 3-D monolithic integrated circuits

    Bobba, S., Chakraborty, A., Thomas, O., Batude, P., Pavlidis, V. F. & De Micheli, G., 2010, IEEE 3D System Integration Conference 2010, 3DIC 2010|IEEE 3D Syst. Integr. Conf., 3DIC. IEEE

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Physical design tradeoffs in power distribution networks for 3-D ICs

    Tsioutsios, I., Pavlidis, V. F. & De Micheli, G., 2010, 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings|IEEE Int. Conf. Electron., Circuits, Syst., ICECS - Proc.. IEEE, p. 430-433 3 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Process-induced skew variation for scaled 2-D and 3-D ICs

    Xu, H., Pavlidis, V. F. & De Micheli, G., 2010, International Workshop on System Level Interconnect Prediction, SLIP|Int. Workshop Syst. Level Interconnect Predict. SLIP. Proceedings of the System Level Interconnect Prediction Workshop, p. 17-24 7 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Synchronization and power integrity issues in 3-D ICs

    Pavlidis, V. F., Xu, H., Tsioutsios, I. & De Micheli, G., 2010, IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS|IEEE Aisa Pac. Conf. Circuits Syst. Proc. APCCAS. IEEE, p. 536-539 3 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2009

    A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs

    Siozios, K., Pavlidis, V. F. & Soudris, D., 2009, Proceedings -Design, Automation and Test in Europe, DATE|Proc. Des. Autom. Test Eur. DATE. IEEE, p. 172-177 5 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Power distribution paths in 3-D ICs

    Pavlidis, V. F. & De Micheli, G., 2009, Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI|Proc. ACM Great Lakes Symp. VLSI GLSVLSI. New York, USA: Association for Computing Machinery, p. 263-268 5 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Repeater insertion for two-terminal nets in three-dimensional integrated circuits

    Xu, H., Pavlidis, V. F. & Micheli, G. D., 2009, Lecture Notes of the Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering|Lect. Notes Inst. Comput. Sci. Soc. Informatics Telecommun. Eng.. Springer Nature, Vol. 20. p. 141-150 9 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2008

    Clock distribution architectures for 3-D SOI integrated circuits

    Pavlidis, V. F., Savidis, I. & Friedman, E. G., 2008, Proceedings - IEEE International SOI Conference|Proc. IEEE Int. SOI Conf.. IEEE, p. 111-112 1 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Clock distribution networks for 3-D integrated circuits

    Pavlidis, V. F., Savidis, I. & Friedman, E. G., 2008, Proceedings of the Custom Integrated Circuits Conference|Proc Custom Integr Circuits Conf. IEEE, p. 651-654 3 p.

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2007

    3-D topologies for Networks-on-Chip

    Pavlidis, V. F. & Friedman, E. G., 2007, 2006 IEEE International Systems-on-Chip Conference, SOC. p. 285-288 4 p. 4063068

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • A software-supported methodology for designing high-performance 3D FPGA architectures

    Siozios, K., Sotiriadis, K., Pavlidis, V. & Soudris, D., 2007, 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC. p. 54-59 6 p. 4402472

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • Exploring alternative 3D FPGA architectures: Design methodology and CAD tool support

    Siozios, K., Sotiriadis, K., Pavlidis, V. F. & Soudris, D., 2007, Proceedings - 2007 International Conference on Field Programmable Logic and Applications, FPL. p. 652-655 4 p. 4380738

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2006

    Via placement for minimum interconnect delay in three-dimensional (3-D) circuits

    Pavlidis, V. F. & Friedman, E. G., 2006, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. p. 4587-4590 4 p. 1693651

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

  • 2005

    Interconnect delay minimization through interlayer via placement in 3-D ICs

    Pavlidis, V. F. & Friedman, E. G., 2005, GLSVSI'05 - Proceedings of the 2005 ACM Great. p. 20-25 6 p. S2.2

    Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review