0.86-nm CET Gate Stacks With Epitaxial High-Dielectrics and FUSI NiSi Metal Electrodes

HDB Gottlob; T Echtermeyer; M Schmidt; T Mollenhauer; JK Efavi; T Wahlbrink; Max C Lemme; M Czernohorsky; E Bugiel; A Fissel

0.86-nm CET Gate Stacks With Epitaxial High-Dielectrics and FUSI NiSi Metal Electrodes

HDB Gottlob, T Echtermeyer, M Schmidt, T Mollenhauer, JK Efavi, T Wahlbrink, Max C Lemme, M Czernohorsky, E Bugiel, A Fissel

Research output: Contribution to journal › Article › peer-review

Original language	English
Pages (from-to)	814-816
Number of pages	3
Journal	Electron Device Letters, IEEE
Volume	27
Issue number	10
Publication status	Published - 2006

Cite this

@article{853bd791413f4279ab29944162e1ffc2,

title = "0.86-nm CET Gate Stacks With Epitaxial High-Dielectrics and FUSI NiSi Metal Electrodes",

author = "HDB Gottlob and T Echtermeyer and M Schmidt and T Mollenhauer and JK Efavi and T Wahlbrink and Lemme, {Max C} and M Czernohorsky and E Bugiel and A Fissel",

year = "2006",

language = "English",

volume = "27",

pages = "814--816",

journal = "Electron Device Letters, IEEE",

publisher = "IEEE",

number = "10",

}

TY - JOUR

T1 - 0.86-nm CET Gate Stacks With Epitaxial High-Dielectrics and FUSI NiSi Metal Electrodes

AU - Gottlob, HDB

AU - Echtermeyer, T

AU - Schmidt, M

AU - Mollenhauer, T

AU - Efavi, JK

AU - Wahlbrink, T

AU - Lemme, Max C

AU - Czernohorsky, M

AU - Bugiel, E

AU - Fissel, A

PY - 2006

Y1 - 2006

M3 - Article

VL - 27

SP - 814

EP - 816

JO - Electron Device Letters, IEEE

JF - Electron Device Letters, IEEE

IS - 10

ER -