A 100,000 fps Vision Sensor with Embedded 535 GOPS/W 256x256 SIMD Processor Array

S.J. Carey; A. Lopich; D.R.W. Barr; B. Wang; P. Dudek

A 100,000 fps Vision Sensor with Embedded 535 GOPS/W 256x256 SIMD Processor Array

S.J. Carey, A. Lopich, D.R.W. Barr, B. Wang, P. Dudek

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

A vision chip operating with 1.9pJ/OP efficiency has been fabricated in 0.18μm CMOS. Each of the 256×256 pixel-processors (dimensions 32×32μm), contains 14 binary and 7 analog registers coupled to a photodiode, an arithmetic logic unit, diffusion and asynchronous propagation networks. At the chip's periphery, facilities exist to allow pixel address extraction, analog or digital readout. The chip has been exploited to conduct real-time image processing operations at 100,000fps, locating a closed-shape object from amongst clutter.

Original language	English
Title of host publication	2013 Symposium on VLSI Circuits
Publisher	IEEE
Pages	182-183
ISBN (Electronic)	978-4-86348-348-4
ISBN (Print)	978-1-4673-5531-5
Publication status	Published - Jun 2013
Event	VLSI Circuits Symposium 2013 - Duration: 1 Jan 1824 → …

Conference

Conference	VLSI Circuits Symposium 2013
Period	1/01/24 → …

Cite this

@inproceedings{d619baf20bb54dee99dfa52233717b1e,

title = "A 100,000 fps Vision Sensor with Embedded 535 GOPS/W 256x256 SIMD Processor Array",

abstract = "A vision chip operating with 1.9pJ/OP efficiency has been fabricated in 0.18μm CMOS. Each of the 256×256 pixel-processors (dimensions 32×32μm), contains 14 binary and 7 analog registers coupled to a photodiode, an arithmetic logic unit, diffusion and asynchronous propagation networks. At the chip's periphery, facilities exist to allow pixel address extraction, analog or digital readout. The chip has been exploited to conduct real-time image processing operations at 100,000fps, locating a closed-shape object from amongst clutter.",

author = "S.J. Carey and A. Lopich and D.R.W. Barr and B. Wang and P. Dudek",

year = "2013",

month = jun,

language = "English",

isbn = "978-1-4673-5531-5",

pages = "182--183",

booktitle = "2013 Symposium on VLSI Circuits",

publisher = "IEEE",

address = "United States",

note = "VLSI Circuits Symposium 2013 ; Conference date: 01-01-1824",

}

TY - GEN

T1 - A 100,000 fps Vision Sensor with Embedded 535 GOPS/W 256x256 SIMD Processor Array

AU - Carey, S.J.

AU - Lopich, A.

AU - Barr, D.R.W.

AU - Wang, B.

AU - Dudek, P.

PY - 2013/6

Y1 - 2013/6

N2 - A vision chip operating with 1.9pJ/OP efficiency has been fabricated in 0.18μm CMOS. Each of the 256×256 pixel-processors (dimensions 32×32μm), contains 14 binary and 7 analog registers coupled to a photodiode, an arithmetic logic unit, diffusion and asynchronous propagation networks. At the chip's periphery, facilities exist to allow pixel address extraction, analog or digital readout. The chip has been exploited to conduct real-time image processing operations at 100,000fps, locating a closed-shape object from amongst clutter.

AB - A vision chip operating with 1.9pJ/OP efficiency has been fabricated in 0.18μm CMOS. Each of the 256×256 pixel-processors (dimensions 32×32μm), contains 14 binary and 7 analog registers coupled to a photodiode, an arithmetic logic unit, diffusion and asynchronous propagation networks. At the chip's periphery, facilities exist to allow pixel address extraction, analog or digital readout. The chip has been exploited to conduct real-time image processing operations at 100,000fps, locating a closed-shape object from amongst clutter.

M3 - Conference contribution

SN - 978-1-4673-5531-5

SP - 182

EP - 183

BT - 2013 Symposium on VLSI Circuits

PB - IEEE

T2 - VLSI Circuits Symposium 2013

Y2 - 1 January 1824

ER -

A 100,000 fps Vision Sensor with Embedded 535 GOPS/W 256x256 SIMD Processor Array

Abstract

Conference

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