TY - CHAP
T1 - A camera that CNNs
T2 - Towards embedded neural networks on pixel processor arrays
AU - Bose, Laurie
AU - Dudek, Piotr
AU - Chen, Jianing
AU - Carey, Stephen
AU - Mayol-Cuevas, Walterio
PY - 2019/10
Y1 - 2019/10
N2 - We present a convolutional neural network implementation for pixel processor array (PPA) sensors. PPA hardware consists of a fine-grained array of general-purpose processing elements, each capable of light capture, data storage, program execution, and communication with neighboring elements. This allows images to be stored and manipulated directly at the point of light capture, rather than having to transfer images to external processing hardware. Our CNN approach divides this array up into 4x4 blocks of processing elements, essentially trading-off image resolution for increased local memory capacity per 4x4 'pixel'. We implement parallel operations for image addition, subtraction and bit-shifting images in this 4x4 block format. Using these components we formulate how to perform ternary weight convolutions upon these images, compactly store results of such convolutions, perform max-pooling, and transfer the resulting sub-sampled data to an attached micro-controller. We train ternary weight filter CNNs for digit recognition and a simple tracking task, and demonstrate inference of these networks upon the SCAMP5 PPA system. This work represents a first step towards embedding neural network processing capability directly onto the focal plane of a sensor.
AB - We present a convolutional neural network implementation for pixel processor array (PPA) sensors. PPA hardware consists of a fine-grained array of general-purpose processing elements, each capable of light capture, data storage, program execution, and communication with neighboring elements. This allows images to be stored and manipulated directly at the point of light capture, rather than having to transfer images to external processing hardware. Our CNN approach divides this array up into 4x4 blocks of processing elements, essentially trading-off image resolution for increased local memory capacity per 4x4 'pixel'. We implement parallel operations for image addition, subtraction and bit-shifting images in this 4x4 block format. Using these components we formulate how to perform ternary weight convolutions upon these images, compactly store results of such convolutions, perform max-pooling, and transfer the resulting sub-sampled data to an attached micro-controller. We train ternary weight filter CNNs for digit recognition and a simple tracking task, and demonstrate inference of these networks upon the SCAMP5 PPA system. This work represents a first step towards embedding neural network processing capability directly onto the focal plane of a sensor.
UR - https://www.mendeley.com/catalogue/b774a621-3217-3536-b692-02a38a63ef48/
U2 - 10.1109/ICCV.2019.00142
DO - 10.1109/ICCV.2019.00142
M3 - Chapter
SN - 9781728148038
T3 - Proceedings of the IEEE International Conference on Computer Vision
SP - 1335
EP - 1344
BT - 2019 IEEE/CVF International Conference on Computer Vision
PB - IEEE
CY - Seoul, Korea
ER -