A CMOS Circuit Implementation of a Spiking Neuron with Bursting and Adaptation on a Biological Timescale

J.H.B. Wijekoon, P. Dudek

    Research output: Chapter in Book/Conference proceedingConference contribution

    Abstract

    This paper proposes a silicon neuron circuit which uses a slow-variable controlled leakage term to extend the repertoire of spiking patterns achievable in an integrate and fire model. The simulations reveal the potential of the circuit to provide a wide variety of neuron firing patterns observed in neocortex, including adapting and non-adapting, regular spiking, fast spiking, bursting, chattering, etc. The firing patterns of basic cell classes are obtained with a simple adjustment of four biasing voltages. The circuit operates in the sub-threshold regime, with time constants similar to biological neurons, and hence is suitable for use in systems requiring such operating speeds. Envisaged applications of the proposed circuit are in large-scale analogue VLSI systems for spiking neural network simulations, brain-inspired circuits for robotics and hybrid silicon/biology systems.
    Original languageEnglish
    Title of host publicationhost publication
    PublisherIEEE
    Publication statusPublished - 26 Nov 2009
    EventIEEE Biomedical Circuits and Systems Conference - Beijing, China
    Duration: 26 Nov 200928 Nov 2009

    Conference

    ConferenceIEEE Biomedical Circuits and Systems Conference
    CityBeijing, China
    Period26/11/0928/11/09

    Keywords

    • CMOS integrated circuits
    • VLSI
    • brain
    • neural chips

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