Abstract
A new vision chip, SCAMP-2, has been developed in a 0.35 μm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architecture. A combination of the addressing flexibility provided by the novel readout scheme and the global operation capability of the analogue processors results in the increased functionality of the smart sensor device. Example applications of the proposed architecture are discussed. In addition to low-level image processing algorithms, such as filtering or edge detection, which are efficiently executed on a nearest-neighbour connected fine-grain massively parallel SIMD array, it is also possible to implement global algorithms, such as histogramming. The proposed architecture enables increased control over wave-propagation-type algorithms and simplifies the design of winner-take-all algorithms. Significant speed-up can be achieved in applications such as visual tracking.
| Original language | English |
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| Title of host publication | Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst |
| Pages | III782-III785 |
| Volume | 3 |
| Publication status | Published - 2003 |
| Event | Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok Duration: 1 Jul 2003 → … |
Conference
| Conference | Proceedings of the 2003 IEEE International Symposium on Circuits and Systems |
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| City | Bangkok |
| Period | 1/07/03 → … |