Abstract
Power consumption has become one of the most important concerns in microprocessor design. However, the potential for further power-saving in microprocessors with a conventional architecture is limited because of their unified architectures and mature low-power techniques. An alternative way is proposed in this paper to save power - embedding a dataflow coprocessor in a conventional RISC processor. The dataflow coprocessor is designed to execute short code segments very efficiently. The primary experimental results show that the dataflow coprocessor can increase the power efficiency of a RISC processor by an order of magnitude. © 2005 IEEE.
| Original language | English |
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| Title of host publication | Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI|Proc. IEEE Comput. Soc. Annu. Symp. VLSI New Frontiers VLSI Design |
| Editors | A. Smailagic, N. Ranganathan |
| Publisher | IEEE Computer Society |
| Pages | 246-247 |
| Number of pages | 1 |
| ISBN (Print) | 076952365X, 9780769523651 |
| DOIs | |
| Publication status | Published - 2005 |
| Event | IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design - Tampa, FL Duration: 1 Jul 2005 → … http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2005.html#LiuF05http://dblp.uni-trier.de/rec/bibtex/conf/isvlsi/LiuF05.xmlhttp://dblp.uni-trier.de/rec/bibtex/conf/isvlsi/LiuF05 |
Conference
| Conference | IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI Design |
|---|---|
| City | Tampa, FL |
| Period | 1/07/05 → … |
| Internet address |