A Self-Compilation Flow Demo on FOS – the FPGA Operating System

Khoa Pham, Anuj Vaishnav, Joseph Powell, Dirk Koch

Research output: Contribution to conferenceAbstractpeer-review

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Abstract

With the introduction of Zynq UltraScale+ MPSoCs equipped with powerful 64-bit ARM CPUs along with a 16nm UltraScale+ FPGA fabric in the same die, we can now build full hardware-software programmable systems and configure the FPGA with accelerators, as needed. Traditionally, accelerators had been developed offline using powerful servers running heavy lifting CAD toolchains.
In this demo, we show a self-compilation system supporting a user-friendly Jupyter Notebook GUI and multi-tenancy use of the FPGA for educational purposes. From a user perspective,
this system compiles accelerators at run-time directly on the ARM CPU without any involvement of the vendor tools. The final bitstreams then execute on the FPGA fabric using PR.
Original languageEnglish
Publication statusAccepted/In press - 2020

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