TY - JOUR
T1 - A Survey on Optical Network-on-Chip Architectures
AU - Werner, Sebastian
AU - Navaridas, Javier
AU - Luján, Mikel
N1 - Funding Information:
This research was conducted with support from the UK Engineering and Physical Sciences Research Council, on grants EP/K015680/1 and EP/K008730/1. Dr. Javier Navaridas is also supported by the European Union’s Horizon 2020 programme under Grant Agreement No. 671553 “ExaNeSt.” Prof. Mikel Luján is supported by a Royal Society University Research Fellowship. Authors’ addresses: S. Werner, J. Navaridas, and M. Luján, Advanced Processor Technologies Research Group, School of Computer Science, The University of Manchester, Oxford Rd., M13 9PL, Manchester, UK; emails: {sebastian.werner, javier.navaridas, mikel.lujan}@manchester.ac.uk. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]. 2017 Copyright is held by the owner/author(s). Publication rights licensed to ACM. ACM 0360-0300/2017/12-ART89 $15.00 https://doi.org/10.1145/3131346
Publisher Copyright:
© 2017 ACM.
PY - 2018/11
Y1 - 2018/11
N2 - Optical on-chip data transmission enabled by silicon photonics (SiP) is widely considered a key technology to overcome the bandwidth and energy limitations of electrical interconnects. The possibility of integrating optical links into the on-chip communication fabric has opened up a fascinating new research field-Optical Networks-on-Chip (ONoCs)-which has been gaining large interest by the community. SiP devices and materials, however, are still evolving, and dealing with optical data transmission on chip makes designers and researchers face a whole new set of obstacles and challenges. Designing efficient ONoCs is a challenging task and requires a detailed knowledge from on-chip traffic demands and patterns down to the physical layout and implications of integrating both electronic and photonic devices. In this paper, we provide an exhaustive review of recently proposed ONoC architectures, discuss their strengths and weaknesses, and outline active research areas.Moreover, we discuss recent research efforts in key enabling technologies, such as on-chip and adaptive laser sources, automatic synthesis tools, and ring heating techniques, which are essential to enable a widespread commercial adoption of ONoCs in the future.
AB - Optical on-chip data transmission enabled by silicon photonics (SiP) is widely considered a key technology to overcome the bandwidth and energy limitations of electrical interconnects. The possibility of integrating optical links into the on-chip communication fabric has opened up a fascinating new research field-Optical Networks-on-Chip (ONoCs)-which has been gaining large interest by the community. SiP devices and materials, however, are still evolving, and dealing with optical data transmission on chip makes designers and researchers face a whole new set of obstacles and challenges. Designing efficient ONoCs is a challenging task and requires a detailed knowledge from on-chip traffic demands and patterns down to the physical layout and implications of integrating both electronic and photonic devices. In this paper, we provide an exhaustive review of recently proposed ONoC architectures, discuss their strengths and weaknesses, and outline active research areas.Moreover, we discuss recent research efforts in key enabling technologies, such as on-chip and adaptive laser sources, automatic synthesis tools, and ring heating techniques, which are essential to enable a widespread commercial adoption of ONoCs in the future.
KW - Adaptive Laser Sources
KW - Hybrid Networks-on-Chip
KW - Network-on-Chip
KW - Optical Networks-on-Chip
KW - Optical buses
KW - Photonic Design Automation Tools
KW - Silicon Photonics
UR - http://www.scopus.com/inward/record.url?scp=85040229782&partnerID=8YFLogxK
UR - http://www.mendeley.com/research/survey-optical-networkonchip-architectures
U2 - 10.1145/3131346
DO - 10.1145/3131346
M3 - Review article
SN - 0360-0300
VL - 50
SP - 1
EP - 37
JO - ACM Computing Surveys
JF - ACM Computing Surveys
IS - 6
M1 - 89
ER -