Adaptive loop tiling for a multi-cluster CMP

Jisheng Zhao; Matthew Horsnell; Mikel Luján; Ian Rogers; Chris Kirkham; Ian Watson

doi:10.1007/978-3-540-69501-1_23

Adaptive loop tiling for a multi-cluster CMP

Jisheng Zhao, Matthew Horsnell, Mikel Luján, Ian Rogers, Chris Kirkham, Ian Watson

Research output: Chapter in Book/Conference proceeding › Conference contribution

Abstract

Loop tiling is a fundamental optimization for improving data locality. Selecting the right tile size combined with the parallelization of loops can provide additional performance increases in the modern of Chip MultiProcessor (CMP) architectures. This paper presents a runtime optimization system which automatically parallelizes loops and searches empirically for the best tile sizes on a scalable multi-cluster CMP. The system is built on top of a virtual machine and targets the runtime parallelization and optimization of Java programs. Experimental results show that runtime parallelization and tile size searching are capable of improving performance for two BLAS kernels and one Lattice-Boltzmann simulation, despite overheads. © 2008 Springer-Verlag Berlin Heidelberg.

Original language	English
Title of host publication	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)\|Lect. Notes Comput. Sci.
Publisher	Springer Nature
Pages	220-232
Number of pages	12
Volume	5022
ISBN (Print)	9783540695004
DOIs	https://doi.org/10.1007/978-3-540-69501-1_23
Publication status	Published - 2008
Event	8th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2008 - Duration: 1 Jul 2008 → … http://dblp.uni-trier.de/db/conf/ica3pp/ica3pp2008.html#ZhaoHLRKW08http://dblp.uni-trier.de/rec/bibtex/conf/ica3pp/ZhaoHLRKW08.xmlhttp://dblp.uni-trier.de/rec/bibtex/conf/ica3pp/ZhaoHLRKW08

Publication series

Name	Lecture Notes in Computer Science

Conference

Conference	8th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2008
Period	1/07/08 → …
Internet address	http://dblp.uni-trier.de/db/conf/ica3pp/ica3pp2008.html#ZhaoHLRKW08http://dblp.uni-trier.de/rec/bibtex/conf/ica3pp/ZhaoHLRKW08.xmlhttp://dblp.uni-trier.de/rec/bibtex/conf/ica3pp/ZhaoHLRKW08

Keywords

Automatic parallelization
Feedback-directed optimization
Loop tiling
Multi-cluster CMP

Access to Document

10.1007/978-3-540-69501-1_23

Cite this

Zhao, J., Horsnell, M., Luján, M., Rogers, I., Kirkham, C., & Watson, I. (2008). Adaptive loop tiling for a multi-cluster CMP. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci. (Vol. 5022, pp. 220-232). (Lecture Notes in Computer Science). Springer Nature. https://doi.org/10.1007/978-3-540-69501-1_23

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abstract = "Loop tiling is a fundamental optimization for improving data locality. Selecting the right tile size combined with the parallelization of loops can provide additional performance increases in the modern of Chip MultiProcessor (CMP) architectures. This paper presents a runtime optimization system which automatically parallelizes loops and searches empirically for the best tile sizes on a scalable multi-cluster CMP. The system is built on top of a virtual machine and targets the runtime parallelization and optimization of Java programs. Experimental results show that runtime parallelization and tile size searching are capable of improving performance for two BLAS kernels and one Lattice-Boltzmann simulation, despite overheads. {\textcopyright} 2008 Springer-Verlag Berlin Heidelberg.",

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author = "Jisheng Zhao and Matthew Horsnell and Mikel Luj{\'a}n and Ian Rogers and Chris Kirkham and Ian Watson",

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Zhao, J, Horsnell, M, Luján, M, Rogers, I, Kirkham, C & Watson, I 2008, Adaptive loop tiling for a multi-cluster CMP. in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. vol. 5022, Lecture Notes in Computer Science, Springer Nature, pp. 220-232, 8th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2008, 1/07/08. https://doi.org/10.1007/978-3-540-69501-1_23

Adaptive loop tiling for a multi-cluster CMP. / Zhao, Jisheng; Horsnell, Matthew; Luján, Mikel et al.
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Vol. 5022 Springer Nature, 2008. p. 220-232 (Lecture Notes in Computer Science).

Research output: Chapter in Book/Conference proceeding › Conference contribution

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AU - Watson, Ian

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N2 - Loop tiling is a fundamental optimization for improving data locality. Selecting the right tile size combined with the parallelization of loops can provide additional performance increases in the modern of Chip MultiProcessor (CMP) architectures. This paper presents a runtime optimization system which automatically parallelizes loops and searches empirically for the best tile sizes on a scalable multi-cluster CMP. The system is built on top of a virtual machine and targets the runtime parallelization and optimization of Java programs. Experimental results show that runtime parallelization and tile size searching are capable of improving performance for two BLAS kernels and one Lattice-Boltzmann simulation, despite overheads. © 2008 Springer-Verlag Berlin Heidelberg.

AB - Loop tiling is a fundamental optimization for improving data locality. Selecting the right tile size combined with the parallelization of loops can provide additional performance increases in the modern of Chip MultiProcessor (CMP) architectures. This paper presents a runtime optimization system which automatically parallelizes loops and searches empirically for the best tile sizes on a scalable multi-cluster CMP. The system is built on top of a virtual machine and targets the runtime parallelization and optimization of Java programs. Experimental results show that runtime parallelization and tile size searching are capable of improving performance for two BLAS kernels and one Lattice-Boltzmann simulation, despite overheads. © 2008 Springer-Verlag Berlin Heidelberg.

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KW - Feedback-directed optimization

KW - Loop tiling

KW - Multi-cluster CMP

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DO - 10.1007/978-3-540-69501-1_23

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BT - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.

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Zhao J, Horsnell M, Luján M, Rogers I, Kirkham C, Watson I. Adaptive loop tiling for a multi-cluster CMP. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci.. Vol. 5022. Springer Nature. 2008. p. 220-232. (Lecture Notes in Computer Science). doi: 10.1007/978-3-540-69501-1_23

Adaptive loop tiling for a multi-cluster CMP

Abstract

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Keywords

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