Adaptive sensing and image processing with a general-purpose pixel-parallel sensor/processor array integrated circuit

    Research output: Chapter in Book/Conference proceedingConference contributionpeer-review

    Abstract

    In this paper, a pixel-parallel image sensor/processor architecture with a fine-grain massively parallel SIMD analogue processor array is overviewed and the latest VLSI implementation, SCAMP-3 vision chip, comprising 128×128 array, fabricated in a 0.35μm CMOS technology, is presented. Examples of real-time image-processing executed on the chip are shown. Sensor-level data reduction, wide dynamic range and adaptive sensing algorithms, enabled by the sensor-processor integration, are discussed. © 2006 IEEE.
    Original languageEnglish
    Title of host publicationCAMPS 2006 - International Workshop on Computer Architecture for Machine Perception and Sensing, Conference Proceedings|CAMPS - Int. Workshop Comput. Archit. Mach. Percept. Sens., Conf. Proc.
    Pages1-6
    Number of pages5
    DOIs
    Publication statusPublished - 2006
    EventCAMPS 2006 - International Workshop on Computer Architecture for Machine Perception and Sensing - Montreal, QC
    Duration: 1 Jul 2006 → …

    Conference

    ConferenceCAMPS 2006 - International Workshop on Computer Architecture for Machine Perception and Sensing
    CityMontreal, QC
    Period1/07/06 → …

    Fingerprint

    Dive into the research topics of 'Adaptive sensing and image processing with a general-purpose pixel-parallel sensor/processor array integrated circuit'. Together they form a unique fingerprint.

    Cite this