AMULET3: a high-performance self-timed ARM microprocessor

S. B. Furber, J. D. Garside, D. A. Gilbert

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review


AMULET3 is a fully asynchronous implementation of ARM architecture v4T and was designed at the University of Manchester between 1996 and 1998. It is the third generation asynchronous ARM, and is aimed at a significantly higher performance level than its predecessors. Achieving this higher performance has required significant enhancements to the internal micro-architecture, such as the introduction of a reorder buffer to support efficient forwarding while retaining exact exception handling. In this paper we present an overview of the AMULET3 core, highlighting the issues which arise when striving for high performance and instruction set compatibility in an asynchronous design framework.

Original languageEnglish
Title of host publicationProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Number of pages6
Publication statusPublished - 1998
EventProceedings of the 1998 IEEE International Conference on Computer Design - Austin, TX, USA
Duration: 5 Oct 19987 Oct 1998


ConferenceProceedings of the 1998 IEEE International Conference on Computer Design
CityAustin, TX, USA


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