Architectural support for exploiting fine grain parallelism

Demian Rosas-Ham, Isuru Herath, Paraskevas Yiapanis, Mikel Luján, Ian Watson

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The advent of multi-core processors, particularly with projections that numbers of cores will continue to increase, has focused attention on parallel programming. It is widely recognized that current programming techniques, including those that are used for scientific parallel programming, will not allow the easy formulation of general purpose applications. An area which is receiving interest is the use of programming styles which are side-effect free. Previous work on parallel functional programming demonstrated the potential of this to permit the easy exploitation of parallelism. Recent systems like Cilk use conventional languages such as C but encourage the use of a largely functional style (side-effect free) when writing programs. An important part of the Cilk runtime is a system to balance the usage of cores. In this paper we present SLAM (Spreading Load with Active Messages), a dynamic load balancing system based on functional language evaluation techniques. We show that SLAM, provided with appropriate hardware support, significantly outperforms the Cilk system. We evaluated our system using tiled CMPs with private and shared L2 caches separately. Our results show that, for the benchmarks evaluated, SLAM outperforms Cilk by 28% on average when using 32-core CMPs with private L2 caches. For the case of the CMPs with shared L2 caches, SLAM was on average 21% faster than Cilk when using 32 cores and 62% faster when using 64 cores. © 2012 IEEE.
Original languageEnglish
Title of host publicationProceedings of the 14th IEEE International Conference on High Performance Computing and Communications, HPCC-2012 - 9th IEEE International Conference on Embedded Software and Systems, ICESS-2012|Proc. IEEE Int. Conf. High Perform. Comput. Commun., HPCC - IEEE Int. Conf. Embedded Softw. Syst., ICESS
PublisherIEEE
Pages61-70
Number of pages9
ISBN (Print)9780769547497
DOIs
Publication statusPublished - 2012
Event14th IEEE International Conference on High Performance Computing and Communications, HPCC-2012 - 9th IEEE International Conference on Embedded Software and Systems, ICESS-2012 - Liverpool
Duration: 1 Jul 2012 → …

Conference

Conference14th IEEE International Conference on High Performance Computing and Communications, HPCC-2012 - 9th IEEE International Conference on Embedded Software and Systems, ICESS-2012
CityLiverpool
Period1/07/12 → …

Keywords

  • chip multiprocessors
  • dynamic load balancing
  • parallel programming
  • work stealing

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