Bandwidth-to-Area Comparison of Through Silicon Vias and Inductive Links for 3-D ICs

Ioannis Papistas, Vasilis Pavlidis

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    Abstract

    Three-dimensional (3-D) integration is a promising technology that can mitigate the deleterious effects of the increased interconnect length in modern ICs by vertically stacking dies. Through silicon vias (TSVs) and AC coupling have been proposed as communication interfaces between multiple stacked dies. This paper investigates these communication schemes for 3-D systems where the link bandwidth is treated as a constraint rather than an objective. A frequency dependent RC model for the TSV and the redistribution layer (RDL) is employed. A first order delay analysis between the two schemes shows comparable performance, but a better area efficiency for the TSV. Considering, however, a multiplexing scheme shows that TSVs with a pitch lower than 20 μm exhibit better bandwidth-to-area efficiency without multiplexing, while the inductive link demonstrates higher efficiency in comparison to TSVs with a pitch larger than 20 μm for a 12:1 multiplexing ratio.
    Original languageEnglish
    Title of host publicationProceedings of the IEEE European Conference on Circuit Theory and Design
    Pages1-4
    Number of pages4
    DOIs
    Publication statusPublished - 2015
    EventIEEE European Conference on Circuit Theory and Design - Norway
    Duration: 22 Aug 201524 Aug 2015

    Conference

    ConferenceIEEE European Conference on Circuit Theory and Design
    CityNorway
    Period22/08/1524/08/15

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