Three-dimensional (3-D) integration is a promising technology that can mitigate the deleterious effects of the increased interconnect length in modern ICs by vertically stacking dies. Through silicon vias (TSVs) and AC coupling have been proposed as communication interfaces between multiple stacked dies. This paper investigates these communication schemes for 3-D systems where the link bandwidth is treated as a constraint rather than an objective. A frequency dependent RC model for the TSV and the redistribution layer (RDL) is employed. A first order delay analysis between the two schemes shows comparable performance, but a better area efficiency for the TSV. Considering, however, a multiplexing scheme shows that TSVs with a pitch lower than 20 μm exhibit better bandwidth-to-area efficiency without multiplexing, while the inductive link demonstrates higher efficiency in comparison to TSVs with a pitch larger than 20 μm for a 12:1 multiplexing ratio.
|Title of host publication||Proceedings of the IEEE European Conference on Circuit Theory and Design|
|Number of pages||4|
|Publication status||Published - 2015|
|Event||IEEE European Conference on Circuit Theory and Design - Norway|
Duration: 22 Aug 2015 → 24 Aug 2015
|Conference||IEEE European Conference on Circuit Theory and Design|
|Period||22/08/15 → 24/08/15|