TY - GEN
T1 - Brewing the first ever automatic memory management utility for SpiNNaker: Real-Time Garbage Collection for STDP simulations
AU - Mikaitis, Mantas
AU - Lester, David
PY - 2017/7/3
Y1 - 2017/7/3
N2 - First generation SpiNNaker chip uses ARM968, with highly limited internal memory space, as its core element. In simulations of learning algorithms, many biologically plausible learning rules require history traces of each neuron’s activity to be stored. As a result, the history traces of neurons rapidly fill the internal memory space eventually reaching the limits of ARM968. To lower the possibility of memory overflow, we propose to introduce a memory management routine working in the background, which must respect the biological timing constraints of the SpiNNaker simulations. Real-time garbage collection is an automatic memory management technique that can satisfy these requirements. This study presents the first ever implementation of real-time garbage collector for SpiNNaker architecture and evaluates the performance, carefully considering the biological real-time constraints of the system.
AB - First generation SpiNNaker chip uses ARM968, with highly limited internal memory space, as its core element. In simulations of learning algorithms, many biologically plausible learning rules require history traces of each neuron’s activity to be stored. As a result, the history traces of neurons rapidly fill the internal memory space eventually reaching the limits of ARM968. To lower the possibility of memory overflow, we propose to introduce a memory management routine working in the background, which must respect the biological timing constraints of the SpiNNaker simulations. Real-time garbage collection is an automatic memory management technique that can satisfy these requirements. This study presents the first ever implementation of real-time garbage collector for SpiNNaker architecture and evaluates the performance, carefully considering the biological real-time constraints of the system.
KW - garbage collection
KW - automatic memory management
KW - hard real-time systems
U2 - 10.1109/IJCNN.2017.7966229
DO - 10.1109/IJCNN.2017.7966229
M3 - Conference contribution
SN - 978-1-5090-6182-2
SP - 3008
EP - 3015
BT - 2017 International Joint Conference on Neural Networks (IJCNN)
T2 - International Joint Conference on Neural Networks (IJCNN 2017)
Y2 - 14 May 2017 through 19 May 2017
ER -