Broadband impedance matching circuit design using numerical optimisation techniques and field measurements

S. N. Yang; H. Y. Li; M. Goldberg; X. Carcelle; F. Onado; S. M. Rowland

doi:10.1109/ISPLC.2007.371162

Broadband impedance matching circuit design using numerical optimisation techniques and field measurements

S. N. Yang, H. Y. Li, M. Goldberg, X. Carcelle, F. Onado, S. M. Rowland

Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

Abstract

After a pre-study of the feasibility of impedance matching circuit design for Broadband Power Line (BPL) communication system, EDF R&D division decided to go ahead in this field. This gave the opportunity to launch a PhD thesis at the University of Manchester. This paper presents a method of designing an optimal broadband impedance matching circuit for maximising a BPL communication equipment (or modem) signal injection into its load at any power line connection port. This optimal Broadband Impedance Matching (BIM) circuit design is achieved in two phases. The first phase uses 'real frequency technique' (with any kind of known load circuit or field load impedance measurement) to find the BIM circuit topology and its initial parameters. This is done by studying the frequency response of the BIM matching circuit that matches to the load. In the second phase, an optimisation method is applied to calculate optimal parameters for the BIM circuit. This is done by maximising the power transfer gain from the BPL modem to the load. This proposed method has been tested using some field load impedance measurements obtained from substations at EdF, France. The results give good confidence on the method in order to be able to have an optimized PLC system. © 2007 IEEE.

Original language	English
Title of host publication	2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07\|IEEE Int. Symp. Power Line Commun. Its Appilc.
Pages	425-430
Number of pages	5
DOIs	https://doi.org/10.1109/ISPLC.2007.371162
Publication status	Published - 2007
Event	2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07 - Pisa Duration: 1 Jul 2007 → …

Conference

Conference	2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07
City	Pisa
Period	1/07/07 → …

Keywords

A numerical optimisation method
Broadband power line communication
Impedance matching circuit design

Access to Document

10.1109/ISPLC.2007.371162

Cite this

Yang, S. N., Li, H. Y., Goldberg, M., Carcelle, X., Onado, F., & Rowland, S. M. (2007). Broadband impedance matching circuit design using numerical optimisation techniques and field measurements. In 2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07|IEEE Int. Symp. Power Line Commun. Its Appilc. (pp. 425-430) https://doi.org/10.1109/ISPLC.2007.371162

@inproceedings{ce70d5717f714335abefd9d6843aeff5,

title = "Broadband impedance matching circuit design using numerical optimisation techniques and field measurements",

abstract = "After a pre-study of the feasibility of impedance matching circuit design for Broadband Power Line (BPL) communication system, EDF R\&D division decided to go ahead in this field. This gave the opportunity to launch a PhD thesis at the University of Manchester. This paper presents a method of designing an optimal broadband impedance matching circuit for maximising a BPL communication equipment (or modem) signal injection into its load at any power line connection port. This optimal Broadband Impedance Matching (BIM) circuit design is achieved in two phases. The first phase uses 'real frequency technique' (with any kind of known load circuit or field load impedance measurement) to find the BIM circuit topology and its initial parameters. This is done by studying the frequency response of the BIM matching circuit that matches to the load. In the second phase, an optimisation method is applied to calculate optimal parameters for the BIM circuit. This is done by maximising the power transfer gain from the BPL modem to the load. This proposed method has been tested using some field load impedance measurements obtained from substations at EdF, France. The results give good confidence on the method in order to be able to have an optimized PLC system. {\textcopyright} 2007 IEEE.",

keywords = "A numerical optimisation method, Broadband power line communication, Impedance matching circuit design",

author = "Yang, \{S. N.\} and Li, \{H. Y.\} and M. Goldberg and X. Carcelle and F. Onado and Rowland, \{S. M.\}",

year = "2007",

doi = "10.1109/ISPLC.2007.371162",

language = "English",

isbn = "1424410908",

pages = "425--430",

booktitle = "2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07|IEEE Int. Symp. Power Line Commun. Its Appilc.",

note = "2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07 ; Conference date: 01-07-2007",

}

Yang, SN, Li, HY, Goldberg, M, Carcelle, X, Onado, F & Rowland, SM 2007, Broadband impedance matching circuit design using numerical optimisation techniques and field measurements. in 2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07|IEEE Int. Symp. Power Line Commun. Its Appilc.. pp. 425-430, 2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07, Pisa, 1/07/07. https://doi.org/10.1109/ISPLC.2007.371162

Broadband impedance matching circuit design using numerical optimisation techniques and field measurements. / Yang, S. N.; Li, H. Y.; Goldberg, M. et al.
2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07|IEEE Int. Symp. Power Line Commun. Its Appilc.. 2007. p. 425-430.

Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

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T1 - Broadband impedance matching circuit design using numerical optimisation techniques and field measurements

AU - Yang, S. N.

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AU - Onado, F.

AU - Rowland, S. M.

PY - 2007

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N2 - After a pre-study of the feasibility of impedance matching circuit design for Broadband Power Line (BPL) communication system, EDF R&D division decided to go ahead in this field. This gave the opportunity to launch a PhD thesis at the University of Manchester. This paper presents a method of designing an optimal broadband impedance matching circuit for maximising a BPL communication equipment (or modem) signal injection into its load at any power line connection port. This optimal Broadband Impedance Matching (BIM) circuit design is achieved in two phases. The first phase uses 'real frequency technique' (with any kind of known load circuit or field load impedance measurement) to find the BIM circuit topology and its initial parameters. This is done by studying the frequency response of the BIM matching circuit that matches to the load. In the second phase, an optimisation method is applied to calculate optimal parameters for the BIM circuit. This is done by maximising the power transfer gain from the BPL modem to the load. This proposed method has been tested using some field load impedance measurements obtained from substations at EdF, France. The results give good confidence on the method in order to be able to have an optimized PLC system. © 2007 IEEE.

AB - After a pre-study of the feasibility of impedance matching circuit design for Broadband Power Line (BPL) communication system, EDF R&D division decided to go ahead in this field. This gave the opportunity to launch a PhD thesis at the University of Manchester. This paper presents a method of designing an optimal broadband impedance matching circuit for maximising a BPL communication equipment (or modem) signal injection into its load at any power line connection port. This optimal Broadband Impedance Matching (BIM) circuit design is achieved in two phases. The first phase uses 'real frequency technique' (with any kind of known load circuit or field load impedance measurement) to find the BIM circuit topology and its initial parameters. This is done by studying the frequency response of the BIM matching circuit that matches to the load. In the second phase, an optimisation method is applied to calculate optimal parameters for the BIM circuit. This is done by maximising the power transfer gain from the BPL modem to the load. This proposed method has been tested using some field load impedance measurements obtained from substations at EdF, France. The results give good confidence on the method in order to be able to have an optimized PLC system. © 2007 IEEE.

KW - A numerical optimisation method

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KW - Impedance matching circuit design

U2 - 10.1109/ISPLC.2007.371162

DO - 10.1109/ISPLC.2007.371162

M3 - Conference contribution

SN - 1424410908

SN - 9781424410903

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BT - 2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07|IEEE Int. Symp. Power Line Commun. Its Appilc.

T2 - 2007 IEEE International Symposium on Power Line Communications and Its Applications, ISPLC'07

Y2 - 1 July 2007

ER -

Broadband impedance matching circuit design using numerical optimisation techniques and field measurements

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