Characterization of processing errors on analog fully-programmable cellular sensor-processor arrays

Stephen J Carey; A Zarandy; Piotr Dudek

doi:10.1109/ISCAS.2014.6865451

Characterization of processing errors on analog fully-programmable cellular sensor-processor arrays

Stephen J Carey, A Zarandy, Piotr Dudek

Research output: Chapter in Book/Conference proceeding › Conference contribution

Abstract

Analog processor arrays, particularly for vision chips, have been in development for a number of years. Based normally on the SIMD computing paradigm, they achieve very high instruction parallelism through use of compact processing elements. A fundamental aspect of processor operation is the ability to copy content of a register to another. This operation carries with it a number of errors. This paper identifies these errors and provides the means by which they can be separated and measured. These techniques can then be applied to analyze any operation upon an analog processor array. The results from such an analysis reflect on the susceptibility of the circuit to process mismatch, and thermal and switch noise performance of a particular analog memory design. ?? 2014 IEEE.

Original language	English
Title of host publication	IEEE International Symposium on Circuits and Systems, ISCAS 2014
Pages	1580-1583
ISBN (Electronic)	978-1-4799-3432-4
DOIs	https://doi.org/10.1109/ISCAS.2014.6865451
Publication status	Published - 2014

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title = "Characterization of processing errors on analog fully-programmable cellular sensor-processor arrays",

abstract = "Analog processor arrays, particularly for vision chips, have been in development for a number of years. Based normally on the SIMD computing paradigm, they achieve very high instruction parallelism through use of compact processing elements. A fundamental aspect of processor operation is the ability to copy content of a register to another. This operation carries with it a number of errors. This paper identifies these errors and provides the means by which they can be separated and measured. These techniques can then be applied to analyze any operation upon an analog processor array. The results from such an analysis reflect on the susceptibility of the circuit to process mismatch, and thermal and switch noise performance of a particular analog memory design. ?? 2014 IEEE.",

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AU - Zarandy, A

AU - Dudek, Piotr

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N2 - Analog processor arrays, particularly for vision chips, have been in development for a number of years. Based normally on the SIMD computing paradigm, they achieve very high instruction parallelism through use of compact processing elements. A fundamental aspect of processor operation is the ability to copy content of a register to another. This operation carries with it a number of errors. This paper identifies these errors and provides the means by which they can be separated and measured. These techniques can then be applied to analyze any operation upon an analog processor array. The results from such an analysis reflect on the susceptibility of the circuit to process mismatch, and thermal and switch noise performance of a particular analog memory design. ?? 2014 IEEE.

AB - Analog processor arrays, particularly for vision chips, have been in development for a number of years. Based normally on the SIMD computing paradigm, they achieve very high instruction parallelism through use of compact processing elements. A fundamental aspect of processor operation is the ability to copy content of a register to another. This operation carries with it a number of errors. This paper identifies these errors and provides the means by which they can be separated and measured. These techniques can then be applied to analyze any operation upon an analog processor array. The results from such an analysis reflect on the susceptibility of the circuit to process mismatch, and thermal and switch noise performance of a particular analog memory design. ?? 2014 IEEE.

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DO - 10.1109/ISCAS.2014.6865451

M3 - Conference contribution

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BT - IEEE International Symposium on Circuits and Systems, ISCAS 2014

ER -

Characterization of processing errors on analog fully-programmable cellular sensor-processor arrays

Abstract

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