Design and optimization of 0.18 µm CMOS transimpedance amplifier for 20 Gb/s optical communications using genetic algorithms

A comprehensive study focusing on the design and optimization of a single stage transimpedance front-end amplifier (TIA) for over 20 Gb/s optical system applications is presented in this paper. The work involves characterizing the most important parameters of the TIA circuit such as frequency bandwidth, transimpedance gain, input referred noise current, group delay and DC power consumption. An optimization procedure exploiting genetic algorithms (GA) technique is employed to improve the TIA performance, obtaining the optimal transistor geometry, which has then led to maximizing the amplifier bandwidth without sacrificing the IRN and group delay parameters. To this end, several multi-objective function formulations are used as fitness function. The simulation results showed that the formulation of the fitness function taking the transistor's transconductance (g_m) and the bandwidth at -3 dB (BW_3dB) into account provides a significant performance. The achieved BW_3dB value, DC power consumption and input referred noise current were 15.7 GHz, 4.6 mW and 9.7 pA/√Hz, respectively, which are promising compared with the state of the art. A MATLAB environment for the genetic algorithm implementation is utilized along with a radio frequency based advanced design system (ADS) software for the 0.18 µm CMOS transimpedance technology simulation.