DReAM: Dynamic re-arrangement of address mapping to improve the performance of DRAMs

Mohsen Ghasempour, Aamer Jaleel, Jim D. Garside, Mikel Luján

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Abstract

    The initial location of data in DRAMs is determined and controlled by the 'address-mapping' and even modern memory controllers use a fixed and run-time-agnostic address mapping. On the other hand, the memory access pattern seen at the memory interface level will dynamically change at run-time. This dynamic nature of memory access pattern and the fixed behavior of address mapping process in DRAM controllers, implied by using a fixed address mapping scheme, means that DRAM performance cannot be exploited efficiently. DReAM is a novel hardware technique that can detect a workload-specific address mapping at run-time based on the application access pattern which improves the performance of DRAMs. The experimental results show that DReAM outperforms the best evaluated address mapping on average by 9%, for mapping-sensitive workloads, by 2% for mapping-insensitive workloads, and up to 28% across all the workloads. DReAM can be seen as an insurance policy capable of detecting which scenarios are not well served by the predefined address mapping.

    Original languageEnglish
    Title of host publicationMEMSYS 2016 - Proceedings of the International Symposium on Memory Systems, 03-06-October-2016
    PublisherAssociation for Computing Machinery
    Pages362-373
    Number of pages12
    ISBN (Electronic)9781450343053
    DOIs
    Publication statusPublished - 3 Oct 2016
    Event2nd International Symposium on Memory Systems - Washington, United States
    Duration: 3 Oct 20166 Oct 2016

    Conference

    Conference2nd International Symposium on Memory Systems
    Abbreviated titleMEMSYS 2016
    Country/TerritoryUnited States
    CityWashington
    Period3/10/166/10/16

    Keywords

    • Address mapping
    • DRAM
    • Memory systems

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