Abstract
We propose a word level, bounded model checking (BMC) algorithm based on translation into the effectively propositional fragment (EPR) of first-order logic. This approach to BMC allows for succinct representation of unrolled transition systems and facilitates reasoning at a higher level of abstraction. We show that the proposed approach can be scaled to industrial hardware model checking problems involving memories and bit-vectors. Another contribution of this work is in generating challenging benchmarks for first-order theorem provers based on the proposed encoding of real-life hardware verification problems into EPR. We report experimental results for these problems for several provers known to be strong in EPR problem solving. A number of these benchmarks have already been released to the TPTP library. © 2012 Springer-Verlag.
Original language | English |
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Title of host publication | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci. |
Pages | 210-224 |
Number of pages | 14 |
Volume | 7364 |
DOIs | |
Publication status | Published - 2012 |
Event | 6th International Joint Conference on Automated Reasoning, IJCAR 2012 - Manchester Duration: 1 Jul 2012 → … |
Conference
Conference | 6th International Joint Conference on Automated Reasoning, IJCAR 2012 |
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City | Manchester |
Period | 1/07/12 → … |