Evolution of Pixel Level Snakes towards an efficient hardware implementation

David Lopez Vilariño, Piotr Dudek

    Research output: Chapter in Book/Conference proceedingConference contributionpeer-review

    Abstract

    Since Pixel Level Snakes (PLS) were introduced, several algorithms implementing this cellular active contour technique have been proposed. In this paper, we review the main features of these algorithms and propose some modifications to optimize the computation performance of PLS when they are executed on fine-grain pixel-parallel processor arrays. The modified algorithm has been implemented on a focal plane cellular processor array (SCAMP-3 vision chip) and tested on several applications of practical interest. © 2007 IEEE.
    Original languageEnglish
    Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst
    Pages2678-2681
    Number of pages3
    Publication statusPublished - 2007
    Event2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA
    Duration: 1 Jul 2007 → …

    Conference

    Conference2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007
    CityNew Orleans, LA
    Period1/07/07 → …

    Fingerprint

    Dive into the research topics of 'Evolution of Pixel Level Snakes towards an efficient hardware implementation'. Together they form a unique fingerprint.

    Cite this