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Feasibility of QoS for SMT

  • Francisco J. Cazorla
  • , Peter M.W. Knijnenburg
  • , Rizos Sakellariou
  • , Enrique Fernandez
  • , Alex Ramirez
  • , Mateo Valero
  • Universitat Politecnica de Catalunya
  • Leiden University
  • Universidad de las Palmas de Gran Canaria

Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

Abstract

Since embedded systems require ever more compute power, SMT processors are viable candidates for future high performance embedded processors. However, SMTs exhibit unpredictable performance due to uncontrolled interaction of threads. Hence, the SMT hardware needs to be adapted in order to meet (soft) real time constraints. We show by a simple policy that the OS can exercise control over the execution of a thread which is required for real time constraints.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
EditorsMarco Danelutto, Marco Vanneschi, Domenico Laforenza
PublisherSpringer Nature
Pages535-540
Number of pages6
ISBN (Electronic)9783540278665
ISBN (Print)354027866570
DOIs
Publication statusPublished - 2004

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume3149
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Keywords

  • Total Throughput
  • Full Speed
  • Memory Bound
  • Static Resource Allocation
  • Reachable Part

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