Hardware implementation of skeletonization algorithm for parallel asynchronous image processing

Alexey Lopich; Piotr Dudek

doi:10.1007/s11265-008-0283-6

Hardware implementation of skeletonization algorithm for parallel asynchronous image processing

Research output: Contribution to journal › Article › peer-review

Abstract

This paper presents an FPGA realisation of an application-specific cellular processor array designed for asynchronous skeletonization of binary images. The skeletonization algorithm is based on iterative thinning utilizing a 'grassfire' transformation approach. The purpose of this work was to test the performance of a fully parallel asynchronous processor array and to evaluate the inhomogeneity of wave propagation velocity. A proof-of-concept design has been implemented and evaluated, the results are presented and discussed. © 2008 Springer Science+Business Media, LLC.

Original language	English
Pages (from-to)	91-103
Number of pages	12
Journal	Journal of Signal Processing Systems
Volume	56
Issue number	1
DOIs	https://doi.org/10.1007/s11265-008-0283-6
Publication status	Published - Jul 2009

Keywords

Asynchronous processing
Binary skeletonization
Grassfire transformation
Wave propagations

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10.1007/s11265-008-0283-6

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title = "Hardware implementation of skeletonization algorithm for parallel asynchronous image processing",

abstract = "This paper presents an FPGA realisation of an application-specific cellular processor array designed for asynchronous skeletonization of binary images. The skeletonization algorithm is based on iterative thinning utilizing a 'grassfire' transformation approach. The purpose of this work was to test the performance of a fully parallel asynchronous processor array and to evaluate the inhomogeneity of wave propagation velocity. A proof-of-concept design has been implemented and evaluated, the results are presented and discussed. {\textcopyright} 2008 Springer Science+Business Media, LLC.",

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author = "Alexey Lopich and Piotr Dudek",

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AB - This paper presents an FPGA realisation of an application-specific cellular processor array designed for asynchronous skeletonization of binary images. The skeletonization algorithm is based on iterative thinning utilizing a 'grassfire' transformation approach. The purpose of this work was to test the performance of a fully parallel asynchronous processor array and to evaluate the inhomogeneity of wave propagation velocity. A proof-of-concept design has been implemented and evaluated, the results are presented and discussed. © 2008 Springer Science+Business Media, LLC.

KW - Asynchronous processing

KW - Binary skeletonization

KW - Grassfire transformation

KW - Wave propagations

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JO - Journal of Signal Processing Systems

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Hardware implementation of skeletonization algorithm for parallel asynchronous image processing

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Keywords

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