Harnessing Hardware Acceleration with RISC-V and the EU Processor

Juan Fumero Alfonso, Athanasios Stratikopoulos, Mehdi Goli, Ruyman Reyes, Konstantinos Nikas, Dionisios Pnevmatikatos, Nectarios Koziris, Christos-Efthymios Kotselidis

Research output: Working paperPreprint

75 Downloads (Pure)


In this talk, we will present the newly EU-funded project AERO (Accelerated EU Cloud) whose mission is to bring up and optimize the software stack of cloud deployments on top of the EU processor. After providing an overview of the AERO project, we will expand on two main components of the software stack to enable seamless acceleration of various programming languages on RISC-V architectures; namely, ComputeAorta which enables
the generation of RISC-V vector instructions from SPIR-V binary modules, and TornadoVM which enables transparent hardware acceleration of managed applications. Finally, we will describe how the ongoing integration of ComputeAorta and TornadoVM will enable a plethora of applications from managed languages to harness RISC-V auto-vectorization completely transparently to developers.
Original languageEnglish
Publication statusPublished - 6 Jun 2023


Dive into the research topics of 'Harnessing Hardware Acceleration with RISC-V and the EU Processor'. Together they form a unique fingerprint.

Cite this