Abstract
The aim of this research is to automate the synthesis process of synchronous elastic (SE) systems whilst exploiting the advantages of data-flow concurrency of asynchronous design. This approach automates the integration of synchrony and asynchrony. Therefore, it makes it possible to investigate high level synthesis of Globally Asynchronous Locally Synchronous (GALS) systems without the need to build trivial links and ports and the adhoc insertion of synchronisers etc. Our proposed method enables the designer to use a unified language to develop flexible multiclocked SoCs.
| Original language | English |
|---|---|
| Title of host publication | Designing with Uncertainity - Opportunities & Challenges Workshop |
| Publisher | University of York |
| Publication status | Published - Mar 2014 |
| Event | PAnDA Workshop on Designing with Uncertainty - Opportunities & Challenges - University of York, UK Duration: 17 Mar 2014 → 19 Mar 2014 |
Conference
| Conference | PAnDA Workshop on Designing with Uncertainty - Opportunities & Challenges |
|---|---|
| City | University of York, UK |
| Period | 17/03/14 → 19/03/14 |
Keywords
- High-Level Synthesis
- Globally Asynchronous Locally Synchronous
- Synchronous Elastic Systems
- Asynchronous Dataflows