Implementation of simd vision chip with 128x128 array of analogue processing elements

Piotr Dudek

doi:10.1109/ISCAS.2005.1465958

Implementation of simd vision chip with 128x128 array of analogue processing elements

Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents the latest implementation of the SIMD Current-mode Analogue Matrix Processor architecture. The SCAMP-3 vision chip has been fabricated in a 0.35μm CMOS technology and comprises a 128×128 general-purpose programmable processor-perpixel array. The architecture of the chip is overviewed and implementation issues are considered. The circuit design of the analogue register is presented, the layout of the Analogue Processing Element is discussed and the design of control-signal drivers and readout circuitry is overviewed. © 2005 IEEE.

Original language	English
Title of host publication	Proceedings - IEEE International Symposium on Circuits and Systems\|Proc IEEE Int Symp Circuits Syst
Pages	5806-5809
Number of pages	3
DOIs	https://doi.org/10.1109/ISCAS.2005.1465958
Publication status	Published - 2005
Event	IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe Duration: 1 Jul 2005 → …

Conference

Conference	IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005
City	Kobe
Period	1/07/05 → …

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10.1109/ISCAS.2005.1465958

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@inproceedings{b83c7977dad24f4585ddc7184ac4a73b,

title = "Implementation of simd vision chip with 128x128 array of analogue processing elements",

abstract = "This paper presents the latest implementation of the SIMD Current-mode Analogue Matrix Processor architecture. The SCAMP-3 vision chip has been fabricated in a 0.35μm CMOS technology and comprises a 128×128 general-purpose programmable processor-perpixel array. The architecture of the chip is overviewed and implementation issues are considered. The circuit design of the analogue register is presented, the layout of the Analogue Processing Element is discussed and the design of control-signal drivers and readout circuitry is overviewed. {\textcopyright} 2005 IEEE.",

author = "Piotr Dudek",

year = "2005",

doi = "10.1109/ISCAS.2005.1465958",

language = "English",

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booktitle = "Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst",

note = "IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 ; Conference date: 01-07-2005",

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PY - 2005

Y1 - 2005

N2 - This paper presents the latest implementation of the SIMD Current-mode Analogue Matrix Processor architecture. The SCAMP-3 vision chip has been fabricated in a 0.35μm CMOS technology and comprises a 128×128 general-purpose programmable processor-perpixel array. The architecture of the chip is overviewed and implementation issues are considered. The circuit design of the analogue register is presented, the layout of the Analogue Processing Element is discussed and the design of control-signal drivers and readout circuitry is overviewed. © 2005 IEEE.

AB - This paper presents the latest implementation of the SIMD Current-mode Analogue Matrix Processor architecture. The SCAMP-3 vision chip has been fabricated in a 0.35μm CMOS technology and comprises a 128×128 general-purpose programmable processor-perpixel array. The architecture of the chip is overviewed and implementation issues are considered. The circuit design of the analogue register is presented, the layout of the Analogue Processing Element is discussed and the design of control-signal drivers and readout circuitry is overviewed. © 2005 IEEE.

U2 - 10.1109/ISCAS.2005.1465958

DO - 10.1109/ISCAS.2005.1465958

M3 - Conference contribution

SP - 5806

EP - 5809

BT - Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst

T2 - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005

Y2 - 1 July 2005

ER -

Implementation of simd vision chip with 128x128 array of analogue processing elements

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