Abstract
With neuromorphic VLSI hardware rapidly moving towards large-scale, possibly immovable systems capable of implementing brain-scale neural models in hardware, there is an emerging need to be able to integrate multi-system combinations of sensors and cortical processors over distributed, multisite configurations. In a recent paper, we proposed a UDP-based AER spiking interface that permits direct bidirectional spike communications over standard networks [1]. Our chosen test case for the demonstration is communication between a large-scale digital neuromorphic system, SpiNNaker [2] and wafer-scale mixed-signal neuromorphic system, BrainScaleS [3]. Since SpiNNaker processors are entirely general-purpose, it is possible to use any given core on a chip for management and system functions. We implemented the UDP interface as a packet interceptor within the Monitor on the chip connected directly to the Ethernet interface. On the BrainScales side, a dedicated FPGA board handles all external communication and configuration of the mixed-signal hardware [4]. The UDP pulse packets use the Ethernet contained on the FPGA board. © 2013 TU Dresden.
Original language | English |
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DOIs | |
Publication status | Published - 2013 |
Event | 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Dresden Duration: 1 Jul 2013 → … |
Conference
Conference | 2013 European Conference on Circuit Theory and Design, ECCTD 2013 |
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City | Dresden |
Period | 1/07/13 → … |