Live demonstration: Real-time image processing on ASPA2 vision system

Alexey Lopich; David R W Barr; Bin Wang; Piotr Dudek

doi:10.1109/ISCAS.2011.5937982

Live demonstration: Real-time image processing on ASPA2 vision system

Alexey Lopich, David R W Barr, Bin Wang, Piotr Dudek

Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

Abstract

This live demonstration presents a vision system based on a digital SIMD vision chip with in-pixel processing capabilities. The system is comprised of asynchronous/synchronous processor array (ASPA2), embedded custom microcontroller with interface circuits and software development environment. Execution of a number of low and medium level image processing algorithms in real time is demonstrated. © 2011 IEEE.

Original language	English
Title of host publication	Proceedings - IEEE International Symposium on Circuits and Systems\|Proc IEEE Int Symp Circuits Syst
Pages	1989
DOIs	https://doi.org/10.1109/ISCAS.2011.5937982
Publication status	Published - 2011
Event	2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011 - Rio de Janeiro Duration: 1 Jul 2011 → … http://dx.doi.org/10.1109/ISCAS.2011.5937774

Conference

Conference	2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
City	Rio de Janeiro
Period	1/07/11 → …
Internet address	http://dx.doi.org/10.1109/ISCAS.2011.5937774

Keywords

Computer vision
Embedded software
Imaging systems
Logic circuits
Software design

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10.1109/ISCAS.2011.5937982

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@inproceedings{65f01feb6cd94386b5c3e9faf3c0774f,

title = "Live demonstration: Real-time image processing on ASPA2 vision system",

abstract = "This live demonstration presents a vision system based on a digital SIMD vision chip with in-pixel processing capabilities. The system is comprised of asynchronous/synchronous processor array (ASPA2), embedded custom microcontroller with interface circuits and software development environment. Execution of a number of low and medium level image processing algorithms in real time is demonstrated. {\textcopyright} 2011 IEEE.",

keywords = "Computer vision, Embedded software, Imaging systems, Logic circuits, Software design",

author = "Alexey Lopich and Barr, {David R W} and Bin Wang and Piotr Dudek",

note = "Image processing algorithm;Interface circuits;Processing capability;Processor array;Real time;Real-time image processing;Software development environment;Vision chips;Vision systems;; 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011 ; Conference date: 01-07-2011",

year = "2011",

doi = "10.1109/ISCAS.2011.5937982",

language = "English",

isbn = "9781424494736",

pages = "1989",

booktitle = "Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst",

url = "http://dx.doi.org/10.1109/ISCAS.2011.5937774",

}

Lopich, A, Barr, DRW, Wang, B & Dudek, P 2011, Live demonstration: Real-time image processing on ASPA2 vision system. in Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst. pp. 1989, 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011, Rio de Janeiro, 1/07/11. https://doi.org/10.1109/ISCAS.2011.5937982

TY - GEN

T1 - Live demonstration: Real-time image processing on ASPA2 vision system

AU - Lopich, Alexey

AU - Barr, David R W

AU - Wang, Bin

AU - Dudek, Piotr

N1 - Image processing algorithm;Interface circuits;Processing capability;Processor array;Real time;Real-time image processing;Software development environment;Vision chips;Vision systems;

PY - 2011

Y1 - 2011

N2 - This live demonstration presents a vision system based on a digital SIMD vision chip with in-pixel processing capabilities. The system is comprised of asynchronous/synchronous processor array (ASPA2), embedded custom microcontroller with interface circuits and software development environment. Execution of a number of low and medium level image processing algorithms in real time is demonstrated. © 2011 IEEE.

AB - This live demonstration presents a vision system based on a digital SIMD vision chip with in-pixel processing capabilities. The system is comprised of asynchronous/synchronous processor array (ASPA2), embedded custom microcontroller with interface circuits and software development environment. Execution of a number of low and medium level image processing algorithms in real time is demonstrated. © 2011 IEEE.

KW - Computer vision

KW - Embedded software

KW - Imaging systems

KW - Logic circuits

KW - Software design

U2 - 10.1109/ISCAS.2011.5937982

DO - 10.1109/ISCAS.2011.5937982

M3 - Conference contribution

SN - 9781424494736

SP - 1989

BT - Proceedings - IEEE International Symposium on Circuits and Systems|Proc IEEE Int Symp Circuits Syst

T2 - 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011

Y2 - 1 July 2011

ER -

Live demonstration: Real-time image processing on ASPA2 vision system

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