Low Power, High-Speed ADCs and digital circuits for SKA

T. Tauqeer; J. Sexton; M. Mohiuddin; M. Missous

Low Power, High-Speed ADCs and digital circuits for SKA

T. Tauqeer, J. Sexton, M. Mohiuddin, M. Missous

Research output: Contribution to journal › Conference article › peer-review

Abstract

The design of ultra low power (< 300 mW), high-speed analogue to digital converter (ADC) is an essential element for the Square Kilometre Array (SKA). This paper describes the design and simulation of a low-power high-speed (4GS/s) analogue to digital converter (ADC) based on two designs of InP/InGaAs Single heterojunction bipolar transistor (SHBT) (5 × 5μm² and 1.5×5μm² emitter area device). The essential difference between these two devices was the process reliability (yield), and thus the overall unit cost. Both devices provided DC and RF performance characteristics ideally suited for the low-power IC design, with high current gain of 70-80. The high-frequency performances differ due to the device geometry with an ft/fmax=78GHz/38GHz for the 5 × 5μm²and ft/fmax=91GHz/83GHz for the 1.5 × 5μm2 emitter area device.

Original language	English
Pages (from-to)	313-316
Number of pages	4
Journal	Proceedings of Science
Volume	132
Publication status	Published - 1 Jan 2009
Event	2009 Wide Field Astronomy and Technology for the Square Kilometre Array, SKADS 2009 - Chateau de Limelette, Belgium Duration: 4 Nov 2009 → 6 Nov 2009

Cite this

@article{79c70accc926481f9c37af3574d59df0,

title = "Low Power, High-Speed ADCs and digital circuits for SKA",

abstract = "The design of ultra low power (< 300 mW), high-speed analogue to digital converter (ADC) is an essential element for the Square Kilometre Array (SKA). This paper describes the design and simulation of a low-power high-speed (4GS/s) analogue to digital converter (ADC) based on two designs of InP/InGaAs Single heterojunction bipolar transistor (SHBT) (5 × 5μm2 and 1.5×5μm2 emitter area device). The essential difference between these two devices was the process reliability (yield), and thus the overall unit cost. Both devices provided DC and RF performance characteristics ideally suited for the low-power IC design, with high current gain of 70-80. The high-frequency performances differ due to the device geometry with an ft/fmax=78GHz/38GHz for the 5 × 5μm2and ft/fmax=91GHz/83GHz for the 1.5 × 5μm2 emitter area device.",

author = "T. Tauqeer and J. Sexton and M. Mohiuddin and M. Missous",

year = "2009",

month = jan,

day = "1",

language = "English",

volume = "132",

pages = "313--316",

journal = "Proceedings of Science",

issn = "1824-8039",

publisher = "Scuola Internazionale Superiore di Studi Avanzati",

note = "2009 Wide Field Astronomy and Technology for the Square Kilometre Array, SKADS 2009 ; Conference date: 04-11-2009 Through 06-11-2009",

}

TY - JOUR

T1 - Low Power, High-Speed ADCs and digital circuits for SKA

AU - Tauqeer, T.

AU - Sexton, J.

AU - Mohiuddin, M.

AU - Missous, M.

PY - 2009/1/1

Y1 - 2009/1/1

N2 - The design of ultra low power (< 300 mW), high-speed analogue to digital converter (ADC) is an essential element for the Square Kilometre Array (SKA). This paper describes the design and simulation of a low-power high-speed (4GS/s) analogue to digital converter (ADC) based on two designs of InP/InGaAs Single heterojunction bipolar transistor (SHBT) (5 × 5μm2 and 1.5×5μm2 emitter area device). The essential difference between these two devices was the process reliability (yield), and thus the overall unit cost. Both devices provided DC and RF performance characteristics ideally suited for the low-power IC design, with high current gain of 70-80. The high-frequency performances differ due to the device geometry with an ft/fmax=78GHz/38GHz for the 5 × 5μm2and ft/fmax=91GHz/83GHz for the 1.5 × 5μm2 emitter area device.

AB - The design of ultra low power (< 300 mW), high-speed analogue to digital converter (ADC) is an essential element for the Square Kilometre Array (SKA). This paper describes the design and simulation of a low-power high-speed (4GS/s) analogue to digital converter (ADC) based on two designs of InP/InGaAs Single heterojunction bipolar transistor (SHBT) (5 × 5μm2 and 1.5×5μm2 emitter area device). The essential difference between these two devices was the process reliability (yield), and thus the overall unit cost. Both devices provided DC and RF performance characteristics ideally suited for the low-power IC design, with high current gain of 70-80. The high-frequency performances differ due to the device geometry with an ft/fmax=78GHz/38GHz for the 5 × 5μm2and ft/fmax=91GHz/83GHz for the 1.5 × 5μm2 emitter area device.

UR - http://www.scopus.com/inward/record.url?scp=85055532241&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:85055532241

SN - 1824-8039

VL - 132

SP - 313

EP - 316

JO - Proceedings of Science

JF - Proceedings of Science

T2 - 2009 Wide Field Astronomy and Technology for the Square Kilometre Array, SKADS 2009

Y2 - 4 November 2009 through 6 November 2009

ER -

Low Power, High-Speed ADCs and digital circuits for SKA

Abstract

Other files and links

Fingerprint

Cite this