M-of-N code decomposition for indicating combinational logic

W. B. Toms, D. A. Edwards

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Abstract

    Self-timed circuits present an attractive solution to the problem of process variation. However, implementing selftimed combinational logic is complex and expensive. In particular, mapping large function blocks into cell-libraries is difficult as decomposing gates introduces new signals which may violate indication. This paper presents a novel method for implementing any m-of-n encoded function block using "bounded gates", where any gate may be decomposed without violating indication. This is achieved by successively decomposing the input encoding into smaller m-of-n codes. The method described in the paper uses algebraic extraction techniques to efficiently determine and quantify potential re-encodings. The results of the synthesis procedure are demonstrated on a range of combinational function blocks. © 2010 IEEE.
    Original languageEnglish
    Title of host publicationProceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
    Place of PublicationUSA
    PublisherIEEE
    Pages15-25
    Number of pages10
    ISBN (Print)9780769540320
    DOIs
    Publication statusPublished - 2010
    Event16th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2010 - Grenoble
    Duration: 1 Jul 2010 → …

    Conference

    Conference16th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2010
    CityGrenoble
    Period1/07/10 → …

    Keywords

    • algebra , logic gates

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