Abstract
As an alternative of adding more and more in-
structions to CPU cores in order to address a wide range
of applications, this paper examines to use a mixed grained
CPU interlay fabric to provide reconfigurable instruction set
extensions. In detail, we are examining to replace the hardened
NEON SIMD unit of an ARM Cortex-A9 with an identical sized
FPGA fabric. We show that by applying a set of optimizations, we
are able to emulate original applications using NEON instructions
at the same hardware cost and at very little performance drop by
an interlay. Moreover we are demonstrating examples where spe-
cial custom instructions running on a CPU-Interlay-hybrid are
substantially outperforming the original hardened CPU-NEON-
system, hence making a strong case to embed reconfigurability
as a beneficial feature in future processors.
structions to CPU cores in order to address a wide range
of applications, this paper examines to use a mixed grained
CPU interlay fabric to provide reconfigurable instruction set
extensions. In detail, we are examining to replace the hardened
NEON SIMD unit of an ARM Cortex-A9 with an identical sized
FPGA fabric. We show that by applying a set of optimizations, we
are able to emulate original applications using NEON instructions
at the same hardware cost and at very little performance drop by
an interlay. Moreover we are demonstrating examples where spe-
cial custom instructions running on a CPU-Interlay-hybrid are
substantially outperforming the original hardened CPU-NEON-
system, hence making a strong case to embed reconfigurability
as a beneficial feature in future processors.
| Original language | English |
|---|---|
| Title of host publication | International Conference on Field-Programmable Logic and Applications |
| DOIs | |
| Publication status | Published - 2017 |
| Event | Field Programmable Logic and Applications - Ghent, Belgium Duration: 4 Sept 2017 → 8 Sept 2017 Conference number: 2017 https://www.fpl2017.org/ |
Publication series
| Name | 2017 27th International Conference on Field Programmable Logic and Applications (FPL) |
|---|---|
| Publisher | IEEE |
| ISSN (Electronic) | 1946-1488 |
Conference
| Conference | Field Programmable Logic and Applications |
|---|---|
| Abbreviated title | FPL |
| Country/Territory | Belgium |
| City | Ghent |
| Period | 4/09/17 → 8/09/17 |
| Internet address |