Making a Case for an ARM Cortex-A9 CPU Interlay Replacing the NEON SIMD Unit

Jose Raul Garcia Ordaz, Dirk Koch

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

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As an alternative of adding more and more in-
structions to CPU cores in order to address a wide range
of applications, this paper examines to use a mixed grained
CPU interlay fabric to provide reconfigurable instruction set
extensions. In detail, we are examining to replace the hardened
NEON SIMD unit of an ARM Cortex-A9 with an identical sized
FPGA fabric. We show that by applying a set of optimizations, we
are able to emulate original applications using NEON instructions
at the same hardware cost and at very little performance drop by
an interlay. Moreover we are demonstrating examples where spe-
cial custom instructions running on a CPU-Interlay-hybrid are
substantially outperforming the original hardened CPU-NEON-
system, hence making a strong case to embed reconfigurability
as a beneficial feature in future processors.
Original languageEnglish
Title of host publicationInternational Conference on Field-Programmable Logic and Applications
Publication statusPublished - 2017
EventField Programmable Logic and Applications - Ghent, Belgium
Duration: 4 Sept 20178 Sept 2017
Conference number: 2017

Publication series

Name2017 27th International Conference on Field Programmable Logic and Applications (FPL)
ISSN (Electronic)1946-1488


ConferenceField Programmable Logic and Applications
Abbreviated titleFPL
Internet address


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