Managing a massively-parallel resource-constrained computing architecture

Cameron Patterson, Thomas Preston, Francesco Galluppi, Steve Furber

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

One approach to creating a massively-parallel high-performance machine is to use large quantities of power-efficient processors, primarily due to the energy consumption of conventional high-performance computing designs. SpiNNaker is a novel high-performance architecture formed by large numbers of highly-interconnected low-power processing elements, more typically found in embedded systems. This paper presents the results of the implementation of a low-overhead management framework enabled by a universal translation layer: SpiNNmate. SpiNNmate is located between a SpiNNaker machine and the communication protocols of external applications, and we include results from a translation of the standards-based SNMP protocol to SpiNNaker. © 2012 IEEE.
Original languageEnglish
Title of host publicationProceedings - 15th Euromicro Conference on Digital System Design, DSD 2012|Proc. - Euromicro Conf. Digit. Syst. Des., DSD
Pages723-726
Number of pages3
DOIs
Publication statusPublished - 2012
Event15th Euromicro Conference on Digital System Design, DSD 2012 - Cesme, Izmir
Duration: 1 Jul 2012 → …

Conference

Conference15th Euromicro Conference on Digital System Design, DSD 2012
CityCesme, Izmir
Period1/07/12 → …

Keywords

  • Computer performance
  • Embedded
  • High performance computing
  • Middleboxes
  • Monitoring

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