Mixed signal SIMD processor array vision chip for real-time image processing

Stephen J. Carey, David R W Barr, Bin Wang, Alexey Lopich, Piotr Dudek

    Research output: Contribution to journalArticlepeer-review

    Abstract

    A prototype vision chip has been designed that incorporates a 20 × 64 array of processing elements on a 31 μm pitch. Each processor element includes 14 bits of digital memory in addition to seven analogue registers. Digital operands include NOR and NOT with operations of diffusion, subtraction, inversion and squaring available in the analogue domain. The cells of the array can be configured as an asynchronous propagation network allowing operations such as flood filling to occur with times of ~1 μs across the array. Exploiting this feature allows the chip to recognise the difference between closed and open shapes at 30,000 frames per second. The chip is fabricated in 0.18 μm CMOS technology.
    Original languageEnglish
    Pages (from-to)385-399
    JournalAnalog Integrated Circuits and Signal Processing
    Volume77
    Issue number3
    DOIs
    Publication statusPublished - Dec 2013

    Keywords

    • Asynchronous image processing
    • Cellular processor array
    • Smart sensor
    • Vision chip

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