Abstract
Modern high-level synthesis (HLS) tools provide software programmers with a path to accelerate complex processing systems by automating the time-consuming task of generating RTL code. Typically, a HLS tool takes a compute-intensive portion of a software application and produces a functionally equivalent hardware unit. However, in particular for bit-level operations, the coding style used to develop the source code corresponding to a compute-intensive kernel hampers the synthesis of high quality results. In this paper, we explore design guidelines for bit-level operations and custom data types that can help software developers to write HDL-friendly C code in order to automatically produce high quality hardware.
| Original language | English |
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| Title of host publication | International Workshop on FPGAs for Software Programmers |
| Publication status | Published - 27 Oct 2017 |