Physical design tradeoffs in power distribution networks for 3-D ICs

Ioannis Tsioutsios; Vasilis F. Pavlidis; Giovanni De Micheli

doi:10.1109/ICECS.2010.5724541

Physical design tradeoffs in power distribution networks for 3-D ICs

Ioannis Tsioutsios, Vasilis F. Pavlidis, Giovanni De Micheli

Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

Abstract

A physical model for the design of the power distribution networks in three-dimensional integrated circuits is proposed. The tradeoffs among the different design parameters are specified and analyzed. Different case studies are explored, indicating that smaller and denser TSVs can deliver power more efficiently as compared to larger and coarsely distributed TSVs. The interplay between the TSV count and the intra-plane power distribution network in reducing the power supply noise is also shown. ©2010 IEEE.

Original language	English
Title of host publication	2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings\|IEEE Int. Conf. Electron., Circuits, Syst., ICECS - Proc.
Publisher	IEEE
Pages	430-433
Number of pages	3
ISBN (Print)	9781424481576
DOIs	https://doi.org/10.1109/ICECS.2010.5724541
Publication status	Published - 2010
Event	2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Athens Duration: 1 Jul 2010 → …

Conference

Conference	2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010
City	Athens
Period	1/07/10 → …

Keywords

3-D integrated circuits
Power distribution networks
Through silicon vias

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10.1109/ICECS.2010.5724541

Cite this

@inproceedings{948b636c100540d59b46ecef8a531946,

title = "Physical design tradeoffs in power distribution networks for 3-D ICs",

abstract = "A physical model for the design of the power distribution networks in three-dimensional integrated circuits is proposed. The tradeoffs among the different design parameters are specified and analyzed. Different case studies are explored, indicating that smaller and denser TSVs can deliver power more efficiently as compared to larger and coarsely distributed TSVs. The interplay between the TSV count and the intra-plane power distribution network in reducing the power supply noise is also shown. {\textcopyright}2010 IEEE.",

keywords = "3-D integrated circuits, Power distribution networks, Through silicon vias",

author = "Ioannis Tsioutsios and Pavlidis, {Vasilis F.} and {De Micheli}, Giovanni",

year = "2010",

doi = "10.1109/ICECS.2010.5724541",

language = "English",

isbn = "9781424481576",

pages = "430--433",

booktitle = "2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings|IEEE Int. Conf. Electron., Circuits, Syst., ICECS - Proc.",

publisher = "IEEE",

address = "United States",

note = "2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 ; Conference date: 01-07-2010",

}

Tsioutsios, I, Pavlidis, VF & De Micheli, G 2010, Physical design tradeoffs in power distribution networks for 3-D ICs. in 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings|IEEE Int. Conf. Electron., Circuits, Syst., ICECS - Proc.. IEEE, pp. 430-433, 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, Athens, 1/07/10. https://doi.org/10.1109/ICECS.2010.5724541

Physical design tradeoffs in power distribution networks for 3-D ICs. / Tsioutsios, Ioannis; Pavlidis, Vasilis F.; De Micheli, Giovanni.
2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings|IEEE Int. Conf. Electron., Circuits, Syst., ICECS - Proc.. IEEE, 2010. p. 430-433.

Research output: Chapter in Book/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Physical design tradeoffs in power distribution networks for 3-D ICs

AU - Tsioutsios, Ioannis

AU - Pavlidis, Vasilis F.

AU - De Micheli, Giovanni

PY - 2010

Y1 - 2010

N2 - A physical model for the design of the power distribution networks in three-dimensional integrated circuits is proposed. The tradeoffs among the different design parameters are specified and analyzed. Different case studies are explored, indicating that smaller and denser TSVs can deliver power more efficiently as compared to larger and coarsely distributed TSVs. The interplay between the TSV count and the intra-plane power distribution network in reducing the power supply noise is also shown. ©2010 IEEE.

AB - A physical model for the design of the power distribution networks in three-dimensional integrated circuits is proposed. The tradeoffs among the different design parameters are specified and analyzed. Different case studies are explored, indicating that smaller and denser TSVs can deliver power more efficiently as compared to larger and coarsely distributed TSVs. The interplay between the TSV count and the intra-plane power distribution network in reducing the power supply noise is also shown. ©2010 IEEE.

KW - 3-D integrated circuits

KW - Power distribution networks

KW - Through silicon vias

U2 - 10.1109/ICECS.2010.5724541

DO - 10.1109/ICECS.2010.5724541

M3 - Conference contribution

SN - 9781424481576

SP - 430

EP - 433

BT - 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings|IEEE Int. Conf. Electron., Circuits, Syst., ICECS - Proc.

PB - IEEE

T2 - 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010

Y2 - 1 July 2010

ER -

Physical design tradeoffs in power distribution networks for 3-D ICs

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Keywords

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