Abstract
Starting with the recipe for the fabrication process of a silicon p-n junction varactor diode, the semiconductor device equations are solved using the finite-element method. The capacitance of the reverse biased diode is extracted using the junction depletion width which is quantified by introducing a depletion factor. Validation of the complete modeling process is achieved by fabricating the diode, mounting it on a microwave circuit and comparing experimental scattering parameter data with those predicted by a circuit simulator with the imported physical model.
Original language | English |
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Pages (from-to) | 722-725 |
Number of pages | 3 |
Journal | Ieee Transactions on Magnetics |
Volume | 40 |
Issue number | 2 |
DOIs | |
Publication status | Published - Mar 2004 |
Keywords
- Capacitance
- Diodes
- Finite-element methods
- Parameter estimation