Portable module relocation and bitstream compression for Xilinx FPGAs

Dirk Koch, Andreas Herkersdorf (Editor), Norbert Wehn (Editor), Michael Hubner (Editor)

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review


This paper presents a novel methodology for generating and compressing configuration bitstreams for modules that can be executed at different positions of an FPGA. The presented methodology for bitstream generation and compression does not need deep knowledge of the bitstream format and it is independent of the target (Xilinx) FPGA family. The approach consists of a design phase where partial bitstreams are decomposed into sequences of module dependent and module independent pieces of configuration data. At run-time, this data can then be recomposed for the individual placement positions by a special DMA configuration controller as one atomic operation without any further software interaction. Our experiments demonstrate that module relocation and fast partial reconfiguration can be implemented at low logic cost.
Original languageEnglish
Title of host publicationProceedings of the 24th International Conference on Field Programmable Logic and Applications
EditorsAndreas Herkersdorf, Norbert Wehn, Michael Hubner
Place of PublicationUSA
Number of pages8
Publication statusPublished - Sept 2014
EventField Programmable Logic and Applications (FPL) - Munich
Duration: 2 Sept 20144 Sept 2014


ConferenceField Programmable Logic and Applications (FPL)


  • FPGA Configurtion
  • Bitstream Compression


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