Abstract
A method for reducing the power consumption in asynchronous micropipeline-based circuits is presented. The method is based around a new design for latch controllers in which the operating mode of the pipeline latches (normally open/transparent or normally closed/opaque) can be selected according to the dynamic processing demand on the circuit. Operating in normally-closed mode prevents spurious transitions from propagating along a static pipeline, at the expense of reduced throughput. Tests of the new latch controller circuits on a pipelined multiplier datapath show that reductions in energy per operation of up to 32% can be obtained by changing to the normally-closed operating mode. Estimates suggest that in a typical application which exhibits a variable processing demand, a power reduction of between 16-24% is possible, with little or no impact on maximum throughput. © 1999 IEEE.
Original language | English |
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Title of host publication | Proceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst. |
Publisher | IEEE Computer Society |
Pages | 27-35 |
Number of pages | 8 |
DOIs | |
Publication status | Published - 1999 |
Event | 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems - Barcelona, Spain Duration: 18 Apr 1999 → 22 Apr 1999 http://dblp.uni-trier.de/db/conf/async/async1999.html#LloydGG99http://dblp.uni-trier.de/rec/bibtex/conf/async/LloydGG99.xmlhttp://dblp.uni-trier.de/rec/bibtex/conf/async/LloydGG99 |
Conference
Conference | 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems |
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Abbreviated title | ASYNC '99 |
Country/Territory | Spain |
City | Barcelona |
Period | 18/04/99 → 22/04/99 |
Internet address |