Reconfigurable latch controllers for low power asynchronous circuits

M. Lewis, J. Garside, L. Brackenbury

    Research output: Chapter in Book/Conference proceedingConference contribution

    Abstract

    A method for reducing the power consumption in asynchronous micropipeline-based circuits is presented. The method is based around a new design for latch controllers in which the operating mode of the pipeline latches (normally open/transparent or normally closed/opaque) can be selected according to the dynamic processing demand on the circuit. Operating in normally-closed mode prevents spurious transitions from propagating along a static pipeline, at the expense of reduced throughput. Tests of the new latch controller circuits on a pipelined multiplier datapath show that reductions in energy per operation of up to 32% can be obtained by changing to the normally-closed operating mode. Estimates suggest that in a typical application which exhibits a variable processing demand, a power reduction of between 16-24% is possible, with little or no impact on maximum throughput. © 1999 IEEE.
    Original languageEnglish
    Title of host publicationProceedings - International Symposium on Asynchronous Circuits and Systems|Proc. Int. Symp. Asynchr. Circuits Syst.
    PublisherIEEE Computer Society
    Pages27-35
    Number of pages8
    DOIs
    Publication statusPublished - 1999
    Event5th International Symposium on Advanced Research in Asynchronous Circuits and Systems - Barcelona, Spain
    Duration: 18 Apr 199922 Apr 1999
    http://dblp.uni-trier.de/db/conf/async/async1999.html#LloydGG99http://dblp.uni-trier.de/rec/bibtex/conf/async/LloydGG99.xmlhttp://dblp.uni-trier.de/rec/bibtex/conf/async/LloydGG99

    Conference

    Conference5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
    Abbreviated titleASYNC '99
    Country/TerritorySpain
    CityBarcelona
    Period18/04/9922/04/99
    Internet address

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