TY - GEN
T1 - Sand Castle Summation for Pixel Processor Arrays
AU - Bose, Laurie
AU - Dudek, Piotr
AU - Chen, Jianing
AU - Carey, Stephen J.
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - Pixel Processor Arrays (PPA) present a new vision sensor/processor architecture consisting of a SIMD array of processor elements, each capable of light capture, storage, processing and local communication. Such a device allows visual data to be efficiently stored and manipulated directly upon the focal plane, but also demands the invention of new approaches and algorithms, suitable for the massively-parallel fine-grain processor arrays. In this paper we implement an image-wide population count algorithm exploiting the parallel processing of the PPA. Performing such a global count was previously unviable for vision processing tasks due to its exhaustive computation time. Our approach shows an improvement of typically two orders of magnitude reduction in computation time, thus allowing it to be incorporated as a core component of many vision tasks upon the PPA.
AB - Pixel Processor Arrays (PPA) present a new vision sensor/processor architecture consisting of a SIMD array of processor elements, each capable of light capture, storage, processing and local communication. Such a device allows visual data to be efficiently stored and manipulated directly upon the focal plane, but also demands the invention of new approaches and algorithms, suitable for the massively-parallel fine-grain processor arrays. In this paper we implement an image-wide population count algorithm exploiting the parallel processing of the PPA. Performing such a global count was previously unviable for vision processing tasks due to its exhaustive computation time. Our approach shows an improvement of typically two orders of magnitude reduction in computation time, thus allowing it to be incorporated as a core component of many vision tasks upon the PPA.
UR - https://www.scopus.com/pages/publications/85122996566
U2 - 10.1109/CNNA49188.2021.9610764
DO - 10.1109/CNNA49188.2021.9610764
M3 - Conference contribution
AN - SCOPUS:85122996566
T3 - International Workshop on Cellular Nanoscale Networks and their Applications
BT - 2021 17th International Workshop on Cellular Nanoscale Networks and their Applications, CNNA 2021
PB - IEEE Computer Society
T2 - 17th International Workshop on Cellular Nanoscale Networks and their Applications, CNNA 2021
Y2 - 29 September 2021 through 1 October 2021
ER -