Abstract
The phase-sensitive or 'lock-in' amplifier is a fundamental tool in experimental physics, and is able to extract exceedingly small signals in the presence of noise. Recently, there has been some interest in portable or embedded lock-in amplifiers for instrumentation and sensing. One difficulty with digital lock-ins is the required degree of numerical precision. Presented is a fast algorithm for combined phase-sensitive multiplication and filtering. It exploits symmetry to reduce the number of arithmetic operations, and is suitable for low-power embedded devices. As well as being computationally much simpler than a direct digital implementation, the results presented show that it yields a lower error in the estimation of the underlying signal amplitude. © 2012 The Institution of Engineering and Technology.
Original language | English |
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Pages (from-to) | 259-261 |
Number of pages | 2 |
Journal | Electronics Letters |
Volume | 48 |
Issue number | 5 |
DOIs | |
Publication status | Published - 1 Mar 2012 |