Abstract
The modelling of large systems of spiking neurons is computationally very demanding in terms of processing power and communication. SpiNNaker - Spiking Neural Network architecture - is a massively parallel computer system designed to provide a cost-effective and flexible simulator for neuroscience experiments. It can model up to a billion neurons and a trillion synapses in biological real time. The basic building block is the SpiNNaker Chip Multiprocessor (CMP), which is a custom-designed globally asynchronous locally synchronous (GALS) system with 18 ARM968 processor nodes residing in synchronous islands, surrounded by a lightweight, packet-switched asynchronous communications infrastructure. In this paper, we review the design requirements for its very demanding target application, the SpiNNaker micro-architecture and its implementation issues. We also evaluate the SpiNNaker CMP, which contains 100 million transistors in a 102-mm2 die, provides a peak performance of 3.96 GIPS, and has a peak power consumption of 1 W when all processor cores operate at the nominal frequency of 180 MHz. SpiNNaker chips are fully operational and meet their power and performance requirements. © 1966-2012 IEEE.
Original language | English |
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Article number | 6515159 |
Pages (from-to) | 1943-1953 |
Number of pages | 10 |
Journal | IEEE Journal of Solid State Circuits |
Volume | 48 |
Issue number | 8 |
DOIs | |
Publication status | Published - 2013 |
Keywords
- Asynchronous interconnect
- Chip multiprocessor
- Energy efficiency
- Globally asynchronous locally synchronous (GALS)
- Network-on-chip
- Neuromorphic hardware
- Real-time simulation
- Spiking neural networks (SNNs)
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SpiNNaker – enabling brain-inspired AI
Furber, S. (Participant), Garside, J. (Participant), Lester, D. (Participant) & Rhodes, O. (Participant)
Impact: Economic, Technological