SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor

M. M. Khan, D. R. Lester, Luis A. Plana, A. Rast, X. Jin, E. Painkras, S. B. Furber

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

SpiNNaker is a novel chip - based on the ARM processor - which is designed to support large scale spiking neural networks simulations. In this paper we describe some of the features that permit SpiNNaker chips to be connected together to form scalable massively-parallel systems. Our eventual goal is to be able to simulate neural networks consisting of 109 neurons running in 'real time', by which we mean that a similarly sized collection of biological neurons would run at the same speed. In this paper we describe the methods by which neural networks are mapped onto the system, and how features designed into the chip are to be exploited in practice. We will also describe the modelling and verification activities by which we hope to ensure that, when the chip is delivered, it will work as anticipated. ©2008 IEEE.
Original languageEnglish
Title of host publicationProceedings of the International Joint Conference on Neural Networks|Proc Int Jt Conf Neural Networks
PublisherIEEE Computer Society
Pages2849-2856
Number of pages7
ISBN (Print)9781424418213
DOIs
Publication statusPublished - 2008
Event2008 International Joint Conference on Neural Networks, IJCNN 2008 - Hong Kong
Duration: 1 Jul 2008 → …
http://dblp.uni-trier.de/db/conf/ijcnn/ijcnn2008.html#RastYKF08http://dblp.uni-trier.de/rec/bibtex/conf/ijcnn/RastYKF08.xmlhttp://dblp.uni-trier.de/rec/bibtex/conf/ijcnn/RastYKF08

Conference

Conference2008 International Joint Conference on Neural Networks, IJCNN 2008
CityHong Kong
Period1/07/08 → …
Internet address

Keywords

  • Computer Science, Artificial Intelligence
  • Computer Science,
  • Cybernetics
  • Engineering, Electrical & Electronic

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