@inproceedings{2df7e8ceb86d459e8798e3d5ca96d5e3,
title = "SpinNNaker: The world's biggest NoC",
keywords = "fault tolerance, integrated circuit modelling, microprocessor chips, network routing, network-on-chip, neural net architecture, silicon, ARM processor cores, NoC, Si, SpinNNaker project, asynchronous packet-switched fabric, deadlock avoidance, fault-tolerance, integer cores, multicast algorithms, network-on-chip communications, silicon area, size 10 m, spike information, spiking neural network architecture, Abstracts, Biological neural networks, Computer architecture, Computers, Educational institutions, Modeling, Real-time systems",
author = "S. Furber",
year = "2014",
month = sep,
day = "1",
doi = "10.1109/NOCS.2014.7008754",
language = "Undefined",
pages = "ii--ii",
booktitle = "Networks-on-Chip (NoCS), 2014 Eighth IEEE/ACM International Symposium on",
}