Abstract
Addition is the most important operation in data processing and its speed has a significant impact on the overall performance of digital circuits. Therefore, many techniques have been proposed for fast adder design. An asynchronous ripple-carry adder is claimed to use a simple circuit implementation to gain a fast average performance as long as the worst cases input patterns rarely happen. However, based on the input vectors from a number of benchmarks, we observe that the worst cases are not exceptional but commonly exist. A simple carry-lookahead scheme is proposed in the paper to speed up the worst-case delay of a ripple-carry adder. The experiment result shows the proposed adder is about 25% faster than an asynchronous ripple-carry adder with only small area and power overheads. © Springer-Verlag Berlin Heidelberg 2005.
| Original language | English |
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| Title of host publication | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|Lect. Notes Comput. Sci. |
| Publisher | Springer Nature |
| Pages | 647-656 |
| Number of pages | 9 |
| Volume | 3728 |
| ISBN (Print) | 3540290133, 9783540290131 |
| DOIs | |
| Publication status | Published - 2005 |
| Event | 15th International Workshop on Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation, PATMOS 2005 - Leuven Duration: 1 Jul 2005 → … http://dblp.uni-trier.de/db/conf/patmos/patmos2005.html#LiuF05http://dblp.uni-trier.de/rec/bibtex/conf/patmos/LiuF05.xmlhttp://dblp.uni-trier.de/rec/bibtex/conf/patmos/LiuF05 |
Publication series
| Name | Lecture Notes in Computer Science |
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Conference
| Conference | 15th International Workshop on Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation, PATMOS 2005 |
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| City | Leuven |
| Period | 1/07/05 → … |
| Internet address |