The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems

M. Katevenis, N. Chrysos, M. Marazakis, I. Mavroidis, F. Chaix, N. Kallimanis, J. Navaridas, J. Goodacre, P. Vicini, A. Biagioni, P. S. Paolucci, A. Lonardo, E. Pastorelli, F. Lo Cicero, R. Ammendola, P. Hopton, P. Coates, G. Taffoni, S. Cozzini, M. KerstenY. Zhang, J. Sahuquillo, S. Lechago, C. Pinto, B. Lietzow, D. Everett, G. Perna

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

ExaNest is one of three European projects that support a ground-breaking computing architecture for exascale-class systems built upon power-efficient 64-bit ARM processors. This group of projects share an 'everything-close' and 'share-anything' paradigm, which trims down the power consumption - by shortening the distance of signals for most data transfers - as well as the cost and footprint area of the installation - by reducing the number of devices needed to meet performance targets. In ExaNeSt, we will design and implement: (i) a physical rack prototype and its liquid-cooling subsystem providing ultra-dense compute packaging, (ii) a storage architecture with distributed (in-node) non-volatile memory (NVM) devices, (iii) a unified, low-latency interconnect, designed to efficiently uphold desired Quality-of-Service guarantees for a mix of storage with inter-processor flows, and (iv) efficient rack-level memory sharing, where each page is cacheable at only a single node. Our target is to test alternative storage and interconnect options on actual hardware, using real-world HPC applications. The ExaNeSt consortium brings together technology, skills, and knowledge across the entire value chain, from computing IP, packaging, and system deployment, all the way up to operating systems, storage, HPC, big data frameworks, and cutting-edge applications.

Original languageEnglish
Title of host publicationProceedings - 19th Euromicro Conference on Digital System Design, DSD 2016
PublisherIEEE
Pages60-67
Number of pages8
ISBN (Electronic)9781509028160
DOIs
Publication statusPublished - 26 Oct 2016
Event19th Euromicro Conference on Digital System Design, DSD 2016 - Limassol, Cyprus
Duration: 31 Aug 20162 Sept 2016

Conference

Conference19th Euromicro Conference on Digital System Design, DSD 2016
Country/TerritoryCyprus
CityLimassol
Period31/08/162/09/16

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