Abstract
The retrenchment approach to the mechanical construction of fault trees, introduced in the first paper for combinational logic circuits, is extended to handle clocked circuits and then feedback circuits. The temporal behaviour of clocked circuits is captured using their causal relations, and the potentially unbounded behaviour of cyclic circuits is decomposed into an iteration over their acyclic counterparts. The repercussions of all this for the theory of retrenchment are elaborated. For clocked circuits, the techniques we present allow glitches and other transient errors to be properly described. For feedback circuits, the plethora of behaviours that can occur, give rise to infinitary fault trees of an appropriate kind. All this paves the way for automated fault tree generation for reactive systems. © 2011 British Computer Society.
Original language | English |
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Pages (from-to) | 609-657 |
Number of pages | 48 |
Journal | Formal Aspects of Computing |
Volume | 25 |
Issue number | 4 |
DOIs | |
Publication status | Published - Jul 2013 |
Keywords
- Fault injection
- Fault tree analysis
- Mechanical fault tree synthesis
- Retrenchment
- Timed and feedback circuits