Trigger-wave collision detecting asynchronous cellular logic array for fast image skeletonization

This paper presents the design of an asynchronous cellular logic array for binary image processing algorithms based on wave propagation/collision in an excitable medium. The array consists of identical logic cells enabling the propagation and detection of wave-front collisions necessary for the object skeletonization. Low power, low area and high processing speed requirements were met by employing the asynchronous dynamic logic approach resulting in a processing time less than 0.45ns/pixel and energy consumption of less than 0.15pJ/pixel. The cell consists of 19 transistors and occupies an area of 7.5×6.3μm 2 in 90nm CMOS technology. The proposed array could be used as a coprocessor in pixel-parallel SIMD architectures aiding the fast execution of medium-level image processing algorithms.