Trigger-wave propagation in arbitrary metrics in asynchronous cellular logic arrays

This paper presents the idea of an asynchronous cellular pixel-parallel logic array for global image processing tasks using trigger-wave propagation in a medium with a hardware-controlled metric. The principles of wave propagation in cellular four-connected logic arrays emulating different distance measure norms are explained and verified using a simplified switched RC circuit model. The proposed gate array consists of only 13 transistors per pixel and was implemented in a standard 90 nm CMOS technology. It provides the propagation medium applicable for binary image skeletonization, Voronoi tessellation or distance transformation tasks where calculating distances in a particular metric (e. g. Euclidean, Manhattan, Chessboard, etc.) is desired.